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參數(shù)資料
| 型號(hào)： | A8983CJT |
| 廠商： | Allegro MicroSystems, Inc. |
| 英文描述： | Switches; Leaded Process Compatible:Yes |
| 中文描述： | 主軸 |
| 文件頁(yè)數(shù)： | 2/2頁(yè) |
| 文件大?。?/td> | 38K |
| 代理商： | A8983CJT |
8983
SPINDLE & VOICE-COIL
ACTUATION MANAGER/DRIVER
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Copyright 1995, Allegro MicroSystems, Inc.
FUNCTIONAL BLOCK DIAGRAM
Dwg. FP-028-1
I
Patented Lossless Current Sensing Eliminates Need
for External Current-Sense Resistor
I
Externally Determined Transconductance, with Hi/Lo
Configuration Switched via Serial Port
I
Forward or Reverse Torque Serial Port Bit Allows
Improved Speed Disturbance Performance
I
Dynamic Braking with User Delay, Activated by
Undervoltage or Serial Port Command
Energy Manager:
I
3.0 V to 5.5 V Operation
I
DC-to-DC Converter Maintains r
DS(on)
Performance
at Low Supply
I
Independent Power-Down (Sleep) Modes for all
Functional Blocks
I
Efficient Active Regeneration Supplies Power
During Retract
I
Supply Under-Voltage Fault Monitor with
Adjustable Trip Point
I
Power-On-Reset Generator for Power Up or
Power Loss with User-Defined Delay
I
Chip Powers Up in Sleep Mode for Minimum
Power Dissipation
I
External 2 MHz System Clock, or Internal Serial Port
Trimmed 2 MHz Clock
I
System Diagnostics
I
Uncommitted Op-amp
DATA ENABLE
CLOCK
SERIAL DATA IN
μ
C
TACH
EXTERNAL
COMMUTATION
BACK-EMF AND
COMMUTATION LOGIC
SLEW
RATE
CONTROL
gm
ENERGY MANAGER
CONTROLLED RETRACT
DC-DC CONVERSION
SLEEP MODES
UV FAULT
gm
+
–
+
–
+
–
SPIN
INPUT
SERVO
INPUT
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