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參數資料
| 型號： | a8237 |
| 廠商： | Altera Corporation |
| 英文描述： | programmable DMA Controller(可編程DMA控制器) |
| 中文描述： | 可編程DMA控制器（可編程DMA的控制器） |
| 文件頁數： | 21/22頁 |
| 文件大?。?/td> | 269K |
| 代理商： | A8237 |
Altera Corporation
25
a8237 Programmable DMA Controller Data Sheet
I
The
a8237
does not support the cascade mode because it would not
be an efficient use of device resources. To implement this capability,
the designer should use a hand-coded module or a stripped down
a8237
function.
On the rising edge of
CLK
, the Harris 82C37A deasserts
nMEMR
on
states 4 and 14, and deasserts
nIOROUT
on state 4. However, this
approach is not reliable from a timing perspective for a CPLD.
The Altera
a8237
deasserts
nMEMR
on the falling edge of
CLK
at the
end of states 4 and 14 and
nIOROUT
at the end of state 4. This action
effectively extends the assertion of these signals by a 1/2 clock cycle.
I
Revision
History
The information contained in the
a8237 Programmable DMA Controller Data
Sheet
version 1.01 supersedes information published in previous versions.
Version 1.01 includes the following changes:
I
I
I
I
The
“State Machine” on page 18
was updated.
The waveforms in
Figures 2
and
3
were updated.
The
“Variations & Clarifications” on page 24
was updated.
Minor style and text changes were made throughout the document.
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| A8255 | PROGRAMMABLE PERIPHERAL INTERFACE ADAPTER |
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