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參數(shù)資料
| 型號： | A6801 |
| 廠商： | Allegro MicroSystems, Inc. |
| 英文描述： | DABiC-5 Latched Sink Drivers |
| 中文描述： | 達比奇- 5鎖存灌電流驅(qū)動器 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大小： | 436K |
| 代理商： | A6801 |
D
2
A6800/A6801
DABiC-5 Latched Sink Drivers
The A6800 and A6801 latched-input BiMOS ICs merge high-current,
high-voltage outputs with CMOS logic. The CMOS input section con-
sists of 4 or 8 data (‘D’ type) latches with associated common CLEAR,
STROBE, and OUTPUT ENABLE circuitry. The power outputs are
bipolar NPN Darlingtons. This merged technology provides versatile,
fl
exible interface. These BiMOS power interface ICs greatly bene
fi
t the
simpli
fi
cation of computer or microprocessor I/O. The A6800 ICs each
contain four latched drivers. A6801 ICs contain eight latched drivers.
The CMOS inputs are compatible with standard CMOS circuits. TTL
circuits may mandate the addition of input pull-up resistors. The bipolar
Darlington outputs are suitable for directly driving many peripheral/
power loads: relays, lamps, solenoids, small dc motors, etc.
All devices have open-collector outputs and integral diodes for induc-
tive load transient suppression. The output transistors are capable of
sinking 600 mA and will withstand at least 50 V in the OFF state.
Because of limitations on package power dissipation, the simultaneous
operation of all drivers at maximum rated current can only be accom-
plished by a reduction in duty cycle. Outputs may be paralleled for
higher load current capability.
The A6800SA is furnished in a standard 14-pin DIP; the A6800SL and
A6801SLW in surface-mountable SOICs; the A6801SA in a 22-pin
DIP with 0.400” (10.16 mm) row centers; the A6801SEP in a 28-lead
PLCC. These devices are lead (Pb) free, with 100% matte tin plated
leadframes.
3.3 V to 5 V logic supply range
To 10 MHz data input rate
High-voltage, high-current outputs
Darlington current-sink outputs, with
improved low-saturation voltages
Use the following complete part numbers when ordering:
AB SO LUTE MAX MUM RAT NGS
Part Number
A6800SA-T
A6800SL-T
A6801SA-T
A6801SEP-T
A6801SLW-T
Pins
14
14
22
28
24
Package
DIP
SOIC
DIP
PLCC
SOIC
Output Voltage, V
CE
............................................
50 V
Supply Voltage, V
DD
.............................................
7 V
Input Voltage Range, V
IN
..............
–0.3 V to V
DD
+0.3 V
Continuous Collector Current, I
C
........................
600 mA
Package Power Dissipation, P
D
,
see
Allowable Power
Disspation chart, page 5
Operating Temperature Range
Ambient Temperature, T
A
............
–20°C to +85°C
Storage Temperature, T
S
..........
–55°C to +150°C
Caution: CMOS devices have input-static protection,
but are susceptible to damage when exposed to
extremely high static-electrical charges.
FEATURES
Relays
Lamps
APPLICATIONS
A6800SA
A6801SEP
A6801SLW
A6801SA
A6800SL
CMOS, TTL compatible inputs
Output transient protection
Internal pull-down resistors
Low-power CMOS latches
Solenoids
Small dc motors
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A6801SA | DABiC-5 Latched Sink Drivers |
| A6801SA-T | DABiC-5 Latched Sink Drivers |
| A6801SEP | DABiC-5 Latched Sink Drivers |
| A6801SLW | DABiC-5 Latched Sink Drivers |
| A6801SLW-T | DABiC-5 Latched Sink Drivers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A6801_09 | 制造商:ALLEGRO 制造商全稱:Allegro MicroSystems 功能描述:DABiC-5 Latched Sink Drivers |
| A68011-000 | 功能描述:可復位保險絲 RoHS:否 制造商:TE Connectivity / Raychem 電流額定值: 電阻:0.08 Ohms (max) 最大直流電壓: 保持電流:2.5 A 安裝風格:Through Hole 端接類型: 跳閘電流:5 A 引線間隔: 系列:RXEF 工作溫度范圍:+ 85 C |
| A68014-000 | 制造商:TE Connectivity 功能描述:55/2322-20-2/6-9CS2528 - Bulk |
| A68015C0GL5 | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:Axial Leaded Multilayer Ceramic Capacitors for General Purpose Class 1, Class 2 and Class 3, 50 VDC, 100 VDC, 200 VDC, 500 VDC |
| A6801NL | 制造商:Pulse Electronics Corporation 功能描述: |
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