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參數(shù)資料
| 型號(hào)： | A64S16161 |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 2M X 16 Bit Low Voltage Super RAM |
| 中文描述： | 2米x 16位低電壓超內(nèi)存 |
| 文件頁(yè)數(shù)： | 3/16頁(yè) |
| 文件大?。?/td> | 240K |
| 代理商： | A64S16161 |
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A64S16161
PRELIMINARY (December, 2003, Version 0.0)
3
AMIC Technology Corp.
Functions
Truth Table
A0-20
CS1#
CS2
WE#
OE#
LB#
UB#
I/O0~7
I/O8~15
Mode
V
L
H
H
L
L
L
Data-Out
Data-Out
Read
V
L
H
H
L
L
H
Data-Out
High-Z
Read
V
L
H
H
L
H
L
High-Z
Data-Out
Read
V
L
H
H
X
H
H
High-Z
High-Z
Output Disable
V
L
H
H
H
X
X
High-Z
High-Z
Output Disable
V
L
H
L
H
L
L
Data-In
Data-In
Write
V
L
H
L
H
L
H
Data-In
High-Z
Write
V
L
H
L
H
H
L
High-Z
Data-In
Write
X
H
H
X
X
X
X
High-Z
High-Z
Standby
X
X
L
X
X
X
X
High-Z
High-Z
Power Down*
1
V : Valid Address. X : High or Low .*1 No Data Retention
Read Operation
It is possible to control data width by LB# and UB# pins.
(1)Reading data from lower byte
Date can be read when the address is set while holding CS1#=L, CS2=H, OE #=L , WE #= H and LB #=L.
(2)Reading data from upper byte
Date can be read when the address is set while holding CS1#=L, CS2=H, OE #=L , WE #= H and UB #=L.
(3)Reading date from both bytes
Date can be read when the address is set while holding CS1#=L, CS2=H, OE #=L , WE #= H , LB #=L and UB #=L.
(4)Page access read
Date can be read by changing A0-A2 when A3-A20 is set while holding CS1#=L, CS2=H, WE #=H, OE #=L, LB #=L and UB #=L.
Writing Operation
(1) Writing data into lower byte ( WE # control )
Data can be written by adding L pulse into WE # when the address is set while holding CS1#=L, CS2=H, OE #=H, LB #=L and
UB #=H.
The data on lower byte are latched up into the memory cell during WE # =L and LB # =L.
(2) Writing data into lower byte (LB # control)
Data can be written by adding L pulse into LB # when the address is set while holding CS1#=L, CS2 =H, OE#=H, UB# =H and
WE#=L.
The data on lower byte are latched up into the memory cell during WE# =L and LB# = L.
(3) Writing data into upper byte (WE # control)
Data can be written by adding L pulse into WE # when the address is set while holding CS1 #=L, CS2 =H, OE #=H, LB # =H and
UB #=L.
The data on upper byte are latched up into the memory cell during WE # =L and UB # = L.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A64S-161RS | 功能描述:DIP 開關(guān)/ SIP 開關(guān) 16 Position 4x1 Trm Top Actuated Ext Sf RoHS:否 制造商:Omron Electronics 位置數(shù)量:10 開關(guān)類型:DIP 執(zhí)行器:Rotary 端子節(jié)距:2.54 mm 觸點(diǎn)形式: 端接類型:Solder Pin 電流額定值:100 mA 電壓額定值 DC: 工作溫度范圍: 安裝:Through Hole |
| A64S9316 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:512K X 16 Bit Low Voltage Super RAM |
| A64S9316G-70 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:512K X 16 Bit Low Voltage Super RAM |
| A64S9316G-70I | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:512K X 16 Bit Low Voltage Super RAM |
| A64S9316G-85 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:512K X 16 Bit Low Voltage Super RAM |
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