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參數(shù)資料
| 型號： | A6273 |
| 廠商： | Allegro MicroSystems, Inc. |
| 英文描述： | 8-Bit Latched DMOS Power Driver(用于要求較高負(fù)載功率系統(tǒng)的8位鎖存DMOS功率驅(qū)動器（250mA輸出電流，50V最小輸出鉗位電壓）) |
| 中文描述： | 8鎖存DMOS功率驅(qū)動器（用于要求較高負(fù)載功率系統(tǒng)的8位鎖存的DMOS功率驅(qū)動器（250mA的輸出電流的50V最小輸出鉗位電壓位）） |
| 文件頁數(shù)： | 7/10頁 |
| 文件大?。?/td> | 172K |
| 代理商： | A6273 |
6273
8-BIT LATCHED
DMOS POWER DRIVER
www.allegromicro.com
TERMINAL DESCRIPTIONS
Terminal No.
1
Terminal Name
CLEAR
IN
1
Function
When (active) LOW, all latches are reset and all outputs go HIGH (turn OFF).
2
CMOS data input to a latch. When strobed, the output then inverts the data
input (IN
1
= HIGH, OUT
1
= LOW).
CMOS data input to a latch. When strobed, the output then inverts the data
input (IN
2
= HIGH, OUT
2
= LOW).
Current-sinking, open-drain DMOS output.
Current-sinking, open-drain DMOS output.
Current-sinking, open-drain DMOS output.
Current-sinking, open-drain DMOS output.
3
IN
2
4
5
6
7
OUT
1
OUT
2
OUT
3
OUT
4
IN
3
8
CMOS data input to a latch. When strobed, the output then inverts the data
input (IN
3
= HIGH, OUT
3
= LOW).
CMOS data input to a latch. When strobed, the output then inverts the data
input (IN
4
= HIGH, OUT
4
= LOW).
Reference terminal for all voltage measurements.
A CMOS dynamic input to all latches. Data on each IN
x
terminal is loaded
into its associated latch on a low-to-high STROBE transition.
9
IN
4
10
11
GROUND
STROBE
12
IN
5
CMOS data input to a latch. When strobed, the output then inverts the data
input (IN
5
= HIGH, OUT
5
= LOW).
CMOS data input to a latch. When strobed, the output then inverts the data
input (IN
6
= HIGH, OUT
6
= LOW).
Current-sinking, open-drain DMOS output.
Current-sinking, open-drain DMOS output.
Current-sinking, open-drain DMOS output.
Current-sinking, open-drain DMOS output.
13
IN
6
14
15
16
17
OUT
5
OUT
6
OUT
7
OUT
8
IN
7
18
CMOS data input to a latch. When strobed, the output then inverts the data
input (IN
7
= HIGH, OUT
7
= LOW).
CMOS data input to a latch. When strobed, the output then inverts the data
input (IN
8
= HIGH, OUT
8
= LOW).
(V
DD
) The logic supply voltage (typically 5 V).
19
IN
8
20
LOGIC SUPPLY
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