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參數(shù)資料
| 型號： | A6130SO8B |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 20 characters x 2 Lines, 5x7 Dot Matric Character and Cursor |
| 中文描述： | 高效率線性電源，電源監(jiān)控和準(zhǔn)確監(jiān)測軟件 |
| 文件頁數(shù)： | 7/14頁 |
| 文件大小： | 500K |
| 代理商： | A6130SO8B |
A6130
the watchdog timer resets and is defined by T
CW
= T
WD
-
OWP(T
WD
).The open window starts after the closed time
window finishes and lasts till T
WD
+ OWP(T
WD
). The open
window time is defined by T
OW
= 2 x OWP(T
WD
).
Forexampleif T
WD
=100ms(actualvalue)and OWP=±
20% this means the closed window lasts during first the
80 ms (T
CW
= 80 ms = 100 ms - 0.2 (100 ms)) and the
open window the next 40 ms (T
OW
= 2 x 0.2 (100 ms) = 40
ms). The watchdog can be serviced between 80 ms and
120 ms after the timer reset. However as the time base is
± 10% accurate, software must use the following calcula-
tion for servicing signal TCL during the open window:
Related to curves (Fig. 10 to Fig. 20), especially Fig. 19
and Fig. 20, the relation between T
WD
and R
EXT
could eas-
ily be defined. Let us take an example describing the vari-
ations due to production and temperature:
1. Choice, T
WD
= 26 ms.
2. Related to Fig. 20, the coefficient (T
WD
to R
EXT
) is 1.125
where R
EXT
is in k
and T
WD
in ms.
3. R
EXT
(typ.) = 26 x 1.125 = 29.3 k .
4.
The ratio between T
WD
= 26 ms and the (TCL period)
= 25.4 ms is 0.975.
Then the relation over the production and the full
temperature range is TCL period = 0.975 x T
WD
or
0.975 x R
EXT
1.125
a) While PRODUCTION value unknown for the
customer when R
EXT
118 k .
b) While operating TEMPERATURE range -40°C
+85°C.
5. If you fixed a TCL period = 26 ms
26 x 1.125
0.975
If during your production the T
WD
time can be mea-
sured at T
J
= +25°C and the μC can adjust the TCL pe-
riod, then the TCL period range will be much larger for
the full operating temperature.
TCL period =
, as typical value.
T
J
R
EXT
=
= 30 k
Timer Clearing and RES Action
The watchdog circuit monitors the activity of the proces-
sor. If the user’s software does not send a pulse to the
TCL input within the programmed open window timeout
period a short watchdog RES pulse is generated which is
equal to T
WD
/ 40 = 2.5 ms typically (see Fig. 5).
Withtheopenwindowconstraintnewsecurityisaddedto
conventional watchdogs by monitoring both software cy-
cle time and execution. Should software clear the watch-
dog too quickly (incorrect cycle time) or too slowly
(incorrectexecution)itwillcausethesystemtobereset.If
software is stuck in a loop which includes the routine to
clear the watchdog then a conventional watchdog would
not make a system reset even though software is mal-
functioning; the A6130 would make a system reset be-
cause the watchdog would be cleared too quickly.
If no TCL signal is applied before the closed and open
windows expire, RES will start to generate square waves
of period (T
CW
+ T
OW
+ T
WDR
). The watchdog will remain in
this state until the next TCL falling edge appears during
an open window, or until a fresh power-up sequence. The
system enable output, EN, can be used to prevent critical
control functions being activated in the event of the sys-
temgoingintothisfailuremode(seesection“Enable-EN
Output"). The RES output must be pulled up to V
OUTPUT
eveniftheoutputisnotusedbythesystem(seeFig.8).
Combined Voltage and Timer Action
The combination of voltage and timer actions is illus-
trated by the sequence of events shown in Fig. 6. On
power-up, when the voltage at V
IN
reaches V
REF
, the
power-on-reset, POR, delay is initialized and holds RES
active for the time of the POR delay. A TCL pulse will have
no effect until this power-on-reset delay is completed.
When the risk exists that TCL temporarily floats, e.g. dur-
ing T
POR
, a pull-up to V
DD
is required on that pin. After the
POR delay has elapsed, RES goes inactive and the
watchdogtimerstartsacting.IfnoTCLpulseoccurs,RES
goes active low for a short time T
WDR
after each closed
and open window period. A TCL pulse coming during the
open window clears the watchdog timer. When the TCL
pulse occurs too early (during the closed window), RES
goesactiveandanewtimeoutsequencestarts.Avoltage
drop below the V
REF
level for longer than typically 5 μs
overrides the timer and immediately forces RES active
and EN inactive. Any further TCL pulse has no effect until
the next power-up sequence has completed.
Enable - EN Output
The system enable output, EN, is inactive always when
RES is active and remains inactive after a RES pulse until
the watchdog is serviced correctly 3 consecutive times
(ie. the TCL pulse must come in the open window). After
three consecutive services of the watchdog with TCL dur-
ing the open window, the EN goes active low. A malfunc-
tioning system would be repeatedly reset by the
watchdog. In a conventional system critical motor con-
trols could be energized each time reset goes inactive
(time allowed for the system to restart) and in this way the
electrical motors driven by the system could function out
of control.TheA6130preventstheabovefailuremodeby
using the EN output to disable the motor controls until
software has successfully cleared the watchdog three
times (ie. the system has correctly restarted after a reset
condition).
7
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