CEQCM = Equivalent capacitance of combinatorial modul" />
參數(shù)資料
型號(hào)： A54SX72A-PQG208I
廠商： Microsemi SoC
文件頁(yè)數(shù)： 31/108頁(yè)
文件大?。?/td> 0K
描述： IC FPGA SX-A 108K 208-PQFP
標(biāo)準(zhǔn)包裝： 24
系列： SX-A
LAB/CLB數(shù)： 6036
輸入/輸出數(shù)： 171
門數(shù)： 108000
電源電壓： 2.25 V ~ 5.25 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 85°C
封裝/外殼： 208-BFQFP
供應(yīng)商設(shè)備封裝： 208-PQFP（28x28）
SX-A Family FPGAs
v5.3
2-9
Where:
CEQCM = Equivalent capacitance of combinatorial modules
(C-cells) in pF
CEQSM = Equivalent capacitance of sequential modules (R-Cells) in pF
CEQI = Equivalent capacitance of input buffers in pF
CEQO = Equivalent capacitance of output buffers in pF
CEQCR = Equivalent capacitance of CLKA/B in pF
CEQHV = Variable capacitance of HCLK in pF
CEQHF = Fixed capacitance of HCLK in pF
CL = Output lead capacitance in pF
fm = Average logic module switching rate in MHz
fn = Average input buffer switching rate in MHz
fp = Average output buffer switching rate in MHz
fq1 = Average CLKA rate in MHz
fq2 = Average CLKB rate in MHz
fs1 = Average HCLK rate in MHz
m = Number of logic modules switching at fm
n = Number of input buffers switching at fn
p = Number of output buffers switching at fp
q1 = Number of clock loads on CLKA
q2 = Number of clock loads on CLKB
r1 = Fixed capacitance due to CLKA
r2 = Fixed capacitance due to CLKB
s1 = Number of clock loads on HCLK
x = Number of I/Os at logic low
y = Number of I/Os at logic high
Table 2-11 CEQ Values for SX-A Devices
A54SX08A
A54SX16A
A54SX32A
A54SX72A
Combinatorial modules (CEQCM)
1.70 pF
2.00 pF
1.80 pF
Sequential modules (CEQCM)
1.50 pF
1.30 pF
1.50 pF
Input buffers (CEQI)
1.30 pF
Output buffers (CEQO)
7.40 pF
Routed array clocks (CEQCR)
1.05 pF
Dedicated array clocks – variable
(CEQHV)
0.85 pF
Dedicated array clocks – fixed (CEQHF)
30.00 pF
55.00 pF
110.00 pF
240.00 pF
Routed array clock A (r1)
35.00 pF
50.00 pF
90.00 pF
310.00 pF
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