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    參數(shù)資料
    型號(hào): A54SX32A-CQ256B
    廠商: Microsemi SoC
    文件頁(yè)數(shù): 17/108頁(yè)
    文件大小: 0K
    描述: IC FPGA SX 48K GATES 256-CQFP
    標(biāo)準(zhǔn)包裝: 1
    系列: SX-A
    LAB/CLB數(shù): 2880
    輸入/輸出數(shù): 203
    門數(shù): 48000
    電源電壓: 2.25 V ~ 5.25 V
    安裝類型: 表面貼裝
    封裝/外殼: 256-BFCQFP,帶拉桿
    供應(yīng)商設(shè)備封裝: 256-CQFP(75x75)
    SX-A Family FPGAs
    1- 12
    v5.3
    SX-A Probe Circuit Control Pins
    SX-A devices contain internal probing circuitry that
    provides built-in access to every node in a design,
    enabling 100% real-time observation and analysis of a
    device's internal logic nodes without design iteration.
    The probe circuitry is accessed by Silicon Explorer II, an
    easy to use, integrated verification and logic analysis tool
    that can sample data at 100 MHz (asynchronous) or
    66 MHz (synchronous). Silicon Explorer II attaches to a
    PC’s standard COM port, turning the PC into a fully
    functional 18-channel logic analyzer. Silicon Explorer II
    allows designers to complete the design verification
    process at their desks and reduces verification time from
    several hours per cycle to a few seconds.
    The Silicon Explorer II tool uses the boundary-scan ports
    (TDI, TCK, TMS, and TDO) to select the desired nets for
    verification. The selected internal nets are assigned to the
    PRA/PRB pins for observation. Figure 1-13 illustrates the
    interconnection between Silicon Explorer II and the FPGA
    to perform in-circuit verification.
    Design Considerations
    In order to preserve device probing capabilities, users
    should avoid using the TDI, TCK, TDO, PRA, and PRB pins
    as input or bidirectional ports. Since these pins are active
    during probing, critical input signals through these pins
    are not available. In addition, the security fuse must not
    be programmed to preserve probing capabilities. Actel
    recommends that you use a 70
    Ω series termination
    resistor on every probe connector (TDI, TCK, TMS, TDO,
    PRA, PRB). The 70
    Ω series termination is used to prevent
    data
    transmission
    corruption
    during
    probing
    and
    reading back the checksum.
    Figure 1-13 Probe Setup
    16
    Additional
    Channels
    SX-A FPGA
    70
    Ω
    70
    Ω
    70
    Ω
    70
    Ω
    70
    Ω
    70
    Ω
    TDI
    TCK
    TMS
    TDO
    PRA
    PRB
    Serial Connection
    Silicon Explorer II
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