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參數(shù)資料
| 型號： | A54SX32A-3CQ208A |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | FPGA |
| 英文描述： | SX-A Family FPGAs |
| 中文描述： | 的SX - A系列FPGA的 |
| 文件頁數(shù)： | 106/108頁 |
| 文件大小： | 720K |
| 代理商： | A54SX32A-3CQ208A |
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SX-A Family FPGAs
4-2
v5.1
Table 2-13
was updated.
2-17
All timing tables were updated.
2-18
to
2-52
v3.0
The
"Actel Secure Programming Technology with FuseLock Prevents Reverse Engineering and
Design Theft" section
was updated.
1-i
The
"Ordering Information" section
was updated.
1-ii
The
"Temperature Grade Offering" section
was updated.
1-iii
The
Figure 1-1 SX-A Family Interconnect Elements
was updated.
1-1
The “
"Clock Resources" section
“was updated
1-5
The
Table 1-1 SX-A Clock Resources
is new.
1-5
The
"User Security" section
is new.
1-7
The
"I/O Modules" section
was updated.
1-7
The
Table 1-2 I/O Features
was updated.
1-8
The
Table 1-3 I/O Characteristics for All I/O Configurations
is new.
1-8
The
Table 1-4 Power-Up Time at which I/Os Become Active
is new
1-8
The
Figure 1-12 Device Selection Wizard
is new.
1-9
The
"Boundary-Scan Pin Configurations and Functions" section
is new.
1-9
The
Table 1-9 Device Configuration Options for Probe Capability (TRST Pin Reserved)
is new.
1-11
The
"SX-A Probe Circuit Control Pins" section
was updated.
1-12
The
"Design Considerations" section
was updated.
1-12
The
Figure 1-13 Probe Setup
was updated.
1-12
The
Design Environment
was updated.
1-13
The
Figure 1-13 Design Flow
is new.
1-11
The
"Absolute Maximum Ratings*" section
was updated.
1-12
The
"Recommended Operating Conditions" section
was updated.
1-12
The
"Electrical Specifications" section
was updated.
1-12
The
"2.5V LVCMOS2 Electrical Specifications" section
was updated.
1-13
The
"SX-A Timing Model"
and
"Sample Path Calculations"
equations were updated.
1-23
The
"Pin Description" section
was updated.
1-14
v2.0.1
The
"Design Environment" section
has been updated.
1-13
The
"I/O Modules" section
, and
Table 1-2 I/O Features
have been updated.
1-8
The
"SX-A Timing Model" section
and the
"Timing Characteristics" section
have new timing
numbers.
1-23
Previous Version Changes in Current Version (v5.1)
Page
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A54SX08A-3CQ208B | SX-A Family FPGAs |
| A54SX16A-3CQ208B | SX-A Family FPGAs |
| A54SX72A-3CQ208B | SX-A Family FPGAs |
| A54SX32A-3CQ208B | SX-A Family FPGAs |
| A54SX08A-3CQ208I | SX-A Family FPGAs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A54SX32A-BG329 | 功能描述:IC FPGA SX 48K GATES 329-BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:SX-A 標(biāo)準(zhǔn)包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計:- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA（27X27） |
| A54SX32A-BG329I | 功能描述:IC FPGA SX 48K GATES 329-BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:SX-A 標(biāo)準(zhǔn)包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計:- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA（27X27） |
| A54SX32A-BG329M | 制造商:Microsemi Corporation 功能描述:FPGA SX-A Family 32K Gates 1800 Cells 238MHz 0.25um Technology 2.5V 329-Pin BGA 制造商:Microsemi Corporation 功能描述:FPGA SX-A 32K GATES 1800 CELLS 238MHZ 0.25UM/0.22UM 2.5V 329 - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 48K GATES 329PBGA 制造商:Microsemi Corporation 功能描述:IC FPGA 249 I/O 329PBGA |
| A54SX32A-BG329PI85 | 制造商:Microsemi Corporation 功能描述:FPGA SX-A 32K GATES 1800 CELLS 238MHZ 0.25UM/0.22UM 2.5V 329 - Trays |
| A54SX32A-BGG329 | 功能描述:IC FPGA 249I/O 329PBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:SX-A 標(biāo)準(zhǔn)包裝:60 系列:XP LAB/CLB數(shù):- 邏輯元件/單元數(shù):10000 RAM 位總計:221184 輸入/輸出數(shù):244 門數(shù):- 電源電壓:1.71 V ~ 3.465 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:388-BBGA 供應(yīng)商設(shè)備封裝:388-FPBGA（23x23） 其它名稱:220-1241 |
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