參數(shù)資料
型號(hào): A54SX32A-1FGG144I
廠商: Microsemi SoC
文件頁(yè)數(shù): 65/108頁(yè)
文件大?。?/td> 0K
描述: IC FPGA SX 48K GATES 144-FBGA
標(biāo)準(zhǔn)包裝: 160
系列: SX-A
LAB/CLB數(shù): 2880
輸入/輸出數(shù): 111
門數(shù): 48000
電源電壓: 2.25 V ~ 5.25 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 144-LBGA
供應(yīng)商設(shè)備封裝: 144-FPBGA(13x13)
SX-A Family FPGAs
1- 2
v5.3
Logic Module Design
The SX-A family architecture is described as a “sea-of-
modules” architecture because the entire floor of the
device is covered with a grid of logic modules with
virtually no chip area lost to interconnect elements or
routing. The Actel SX-A family provides two types of
logic
modules:
the
register
cell
(R-cell)
and
the
combinatorial cell (C-cell).
The R-cell contains a flip-flop featuring asynchronous clear,
asynchronous preset, and clock enable, using the S0 and S1
lines control signals (Figure 1-2). The R-cell registers feature
programmable clock polarity selectable on a register-by-
register basis. This provides additional flexibility while
allowing mapping of synthesized functions into the SX-A
FPGA. The clock source for the R-cell can be chosen from
either the hardwired clock, the routed clocks, or internal
logic.
The C-cell implements a range of combinatorial functions
of up to five inputs (Figure 1-3). Inclusion of the DB input
and its associated inverter function allows up to 4,000
different combinatorial functions to be implemented in a
single module. An example of the flexibility enabled by
the inversion capability is the ability to integrate a 3-input
exclusive-OR function into a single C-cell. This facilitates
construction of 9-bit parity-tree functions with 1.9 ns
propagation delays.
Module Organization
All C-cell and R-cell logic modules are arranged into
horizontal banks called Clusters. There are two types of
Clusters: Type 1 contains two C-cells and one R-cell, while
Type 2 contains one C-cell and two R-cells.
Clusters
are
grouped
together
into
SuperClusters
(Figure 1-4 on page 1-3). SuperCluster 1 is a two-wide
grouping of Type 1 Clusters. SuperCluster 2 is a two-wide
group containing one Type 1 Cluster and one Type 2
Cluster. SX-A devices feature more SuperCluster 1
modules than SuperCluster 2 modules because designers
typically require significantly more combinatorial logic
than flip-flops.
Figure 1-2 R-Cell
Figure 1-3 C-Cell
DQ
DirectConnect
Input
CLKA,
CLKB,
Internal Logic
HCLK
CKS
CKP
CLR
PRE
Y
Routed
Data Input
S0
S1
D0
D1
D2
D3
DB
A0 B0
A1 B1
Sa
Sb
Y
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