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參數(shù)資料
| 型號(hào)： | A54SX16A-1PQG208 |
| 廠商： | Microsemi SoC |
| 文件頁數(shù)： | 9/108頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA SX 24K GATES 208-PQFP |
| 標(biāo)準(zhǔn)包裝： | 24 |
| 系列： | SX-A |
| LAB/CLB數(shù)： | 1452 |
| 輸入/輸出數(shù)： | 175 |
| 門數(shù)： | 24000 |
| 電源電壓： | 2.25 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 208-BFQFP |
| 供應(yīng)商設(shè)備封裝： | 208-PQFP（28x28） |
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SX-A Family FPGAs
4- 2
v5.3
v4.0
Table 2-12 was updated.
(continued)
The was updated.
The "Sample Path Calculations" were updated.
Table 2-13 was updated.
Table 2-13 was updated.
All timing tables were updated.
2-18 to
v3.0
Design Theft" section was updated.
The "Ordering Information" section was updated.
The "Temperature Grade Offering" section was updated.
The Figure 1-1 SX-A Family Interconnect Elements was updated.
The “"Clock Resources" section“was updated
The Table 1-1 SX-A Clock Resources is new.
The "User Security" section is new.
The "I/O Modules" section was updated.
The Table 1-2 I/O Features was updated.
The Figure 1-12 Device Selection Wizard is new.
The "SX-A Probe Circuit Control Pins" section was updated.
The "Design Considerations" section was updated.
The Figure 1-13 Probe Setup was updated.
The Design Environment was updated.
The Figure 1-13 Design Flow is new.
The "Absolute Maximum Ratings*" section was updated.
The "Recommended Operating Conditions" section was updated.
The "Electrical Specifications" section was updated.
The "2.5V LVCMOS2 Electrical Specifications" section was updated.
The "SX-A Timing Model" and "Sample Path Calculations" equations were updated.
The "Pin Description" section was updated.
v2.0.1
The "Design Environment" section has been updated.
The "I/O Modules" section, and Table 1-2 I/O Features have been updated.
The "SX-A Timing Model" section and the "Timing Characteristics" section have new timing
numbers.
Previous Version Changes in Current Version (v5 . 3)
Page
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A54SX16A-PQ208I | IC FPGA SX 24K GATES 208-PQFP |
| A54SX16A-1PQ208 | IC FPGA SX 24K GATES 208-PQFP |
| AMM22DRSN-S664 | CONN EDGECARD 44POS DIP .156 SLD |
| AMM22DRSD-S664 | CONN EDGECARD 44POS DIP .156 SLD |
| RSA50DTKN-S288 | CONN EDGECARD 100PS .125 EXTEND |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A54SX16A-1PQG208I | 功能描述:IC FPGA SX 24K GATES 208-PQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:SX-A 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA（17x17） |
| A54SX16A-1PQG208M | 制造商:Microsemi Corporation 功能描述:FPGA SX-A Family 16K Gates 924 Cells 263MHz 0.25um/0.22um (CMOS) Technology 2.5V 208-Pin PQFP 制造商:Microsemi Corporation 功能描述:FPGA SX-A 16K GATES 924 CELLS 263MHZ 0.25UM/0.22UM 2.5V 208P - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 24K GATES 208PQFP |
| A54SX16A-1TQ100 | 功能描述:IC FPGA SX 24K GATES 100-TQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:SX-A 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA（17x17） |
| A54SX16A-1TQ100I | 功能描述:IC FPGA SX 24K GATES 100-TQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:SX-A 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA（17x17） |
| A54SX16A-1TQ100M | 制造商:Microsemi Corporation 功能描述:FPGA SX-A 16K GATES 924 CELLS 263MHZ 0.25UM/0.22UM 2.5V 100T - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 24K GATES 100TQFP |
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