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參數(shù)資料
| 型號： | A54SX16-3VQ208I |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | LM199/LM299/LM399 Precision Reference; Package: TO-46; No of Pins: 4 |
| 中文描述： | 54SX家庭的FPGA |
| 文件頁數(shù)： | 5/57頁 |
| 文件大?。?/td> | 415K |
| 代理商： | A54SX16-3VQ208I |
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v3.1
5
5 4 S X F a m ily F P G A s
The C-cell implements a range of combinatorial functions
up to 5-inputs (
Figure3
). Inclusion of the DB input and its
associated inverter function dramatically increases the
number of combinatorial functions that can be
implemented in a single module from 800 options in
previous architectures to more than 4,000 in the SX
architecture. An example of the improved flexibility
enabled by the inversion capability is the ability to integrate
a 3-input exclusive-OR function into a single C-cell. This
facilitates construction of 9-bit parity-tree functions with 2
ns propagation delays. At the same time, the C-cell
structure is extremely synthesis friendly, simplifying the
overall design and reducing synthesis time.
C hip A rc hit e c t ure
The SX family’s chip architecture provides a unique
approach to module organization and chip routing that
delivers the best register/logic mix for a wide variety of new
and emerging applications.
Module Org a niz a t ion
Actel has arranged all C-cell and R-cell logic modules into
horizontal banks called
Clusters
. There are two types of
Clusters: Type 1 contains two C-cells and one R-cell, while
Type 2 contains one C-cell and two R-cells.
To increase design efficiency and device performance, Actel
has further organized these modules into
SuperClusters
(
Figure4 on page6
). SuperCluster 1 is a two-wide grouping
of Type 1 clusters. SuperCluster 2 is a two-wide group
containing one Type 1 cluster and one Type 2 cluster. SX
devices feature more SuperCluster 1 modules than
SuperCluster 2 modules because designers typically require
significantly more combinatorial logic than flip-flops.
Figure 2
R-Cell
Figure 3
C-Cell
Direct
Connect
Input
CLKA,
CLKB,
Internal Logic
HCLK
CKS
CKP
CLRB
PSETB
Y
D
Q
Routed
Data Input
S0
S1
D0
D1
D2
D3
DB
A0
B0
A1
B1
Sa
Sb
Y
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| A54SX16-3VQ208M | 54SX Family FPGAs |
| A54SX16-3VQ208PP | LM19 2.4V, 10μA, TO-92 Temperature Sensor; Package: TO-92; No of Pins: 3; Qty per Container: 1800; Container: Box |
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| A54SX16-BG208M | LM20123 3A, 1.5MHz PowerWise ® Synchronous Buck Regulator; Package: TSSOP EXP PAD; No of Pins: 16; Qty per Container: 250; Container: Reel |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A54SX16A-1FG144 | 功能描述:IC FPGA SX 24K GATES 144-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:SX-A 標準包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應商設(shè)備封裝:256-FPBGA（17x17） |
| A54SX16A-1FG144I | 功能描述:IC FPGA SX 24K GATES 144-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:SX-A 標準包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應商設(shè)備封裝:256-FPBGA（17x17） |
| A54SX16A-1FG144M | 制造商:Microsemi Corporation 功能描述:FPGA SX-A 16K GATES 924 CELLS 263MHZ 0.25UM/0.22UM 2.5V 144F - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 111 I/O 144FBGA |
| A54SX16A-1FG256 | 功能描述:IC FPGA SX 24K GATES 256-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:SX-A 標準包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應商設(shè)備封裝:256-FPBGA（17x17） |
| A54SX16A-1FG256I | 功能描述:IC FPGA SX 24K GATES 256-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:SX-A 標準包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計:- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應商設(shè)備封裝:484-FPBGA（27X27） |
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