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參數(shù)資料
| 型號： | A54SX08A-3CQ208I |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | FPGA |
| 英文描述： | SX-A Family FPGAs |
| 中文描述： | 的SX - A系列FPGA的 |
| 文件頁數(shù)： | 106/108頁 |
| 文件大?。?/td> | 720K |
| 代理商： | A54SX08A-3CQ208I |
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SX-A Family FPGAs
4-2
v5.1
Table 2-13
was updated.
2-17
All timing tables were updated.
2-18
to
2-52
v3.0
The
"Actel Secure Programming Technology with FuseLock Prevents Reverse Engineering and
Design Theft" section
was updated.
1-i
The
"Ordering Information" section
was updated.
1-ii
The
"Temperature Grade Offering" section
was updated.
1-iii
The
Figure 1-1 SX-A Family Interconnect Elements
was updated.
1-1
The “
"Clock Resources" section
“was updated
1-5
The
Table 1-1 SX-A Clock Resources
is new.
1-5
The
"User Security" section
is new.
1-7
The
"I/O Modules" section
was updated.
1-7
The
Table 1-2 I/O Features
was updated.
1-8
The
Table 1-3 I/O Characteristics for All I/O Configurations
is new.
1-8
The
Table 1-4 Power-Up Time at which I/Os Become Active
is new
1-8
The
Figure 1-12 Device Selection Wizard
is new.
1-9
The
"Boundary-Scan Pin Configurations and Functions" section
is new.
1-9
The
Table 1-9 Device Configuration Options for Probe Capability (TRST Pin Reserved)
is new.
1-11
The
"SX-A Probe Circuit Control Pins" section
was updated.
1-12
The
"Design Considerations" section
was updated.
1-12
The
Figure 1-13 Probe Setup
was updated.
1-12
The
Design Environment
was updated.
1-13
The
Figure 1-13 Design Flow
is new.
1-11
The
"Absolute Maximum Ratings*" section
was updated.
1-12
The
"Recommended Operating Conditions" section
was updated.
1-12
The
"Electrical Specifications" section
was updated.
1-12
The
"2.5V LVCMOS2 Electrical Specifications" section
was updated.
1-13
The
"SX-A Timing Model"
and
"Sample Path Calculations"
equations were updated.
1-23
The
"Pin Description" section
was updated.
1-14
v2.0.1
The
"Design Environment" section
has been updated.
1-13
The
"I/O Modules" section
, and
Table 1-2 I/O Features
have been updated.
1-8
The
"SX-A Timing Model" section
and the
"Timing Characteristics" section
have new timing
numbers.
1-23
Previous Version Changes in Current Version (v5.1)
Page
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A54SX16A-3CQ208I | SX-A Family FPGAs |
| A54SX72A-3CQ208I | SX-A Family FPGAs |
| A54SX32A-3CQ208I | SX-A Family FPGAs |
| A54SX08A-3CQ208M | SX-A Family FPGAs |
| A54SX16A-3CQ208M | SX-A Family FPGAs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A54SX08A-3CQ208M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs |
| A54SX08A-3FG208 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs |
| A54SX08A-3FG208A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs |
| A54SX08A-3FG208B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs |
| A54SX08A-3FG208I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs |
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