- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄4481 > A54SX08A-1FGG144I (Microsemi SoC)IC FPGA SX 12K GATES 144-FBGA PDF資料下載
參數(shù)資料
| 型號： | A54SX08A-1FGG144I |
| 廠商： | Microsemi SoC |
| 文件頁數(shù)： | 26/108頁 |
| 文件大小： | 0K |
| 描述： | IC FPGA SX 12K GATES 144-FBGA |
| 標(biāo)準(zhǔn)包裝： | 160 |
| 系列： | SX-A |
| LAB/CLB數(shù)： | 768 |
| 輸入/輸出數(shù)： | 111 |
| 門數(shù)： | 12000 |
| 電源電壓： | 2.25 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 144-LBGA |
| 供應(yīng)商設(shè)備封裝： | 144-FPBGA（13x13） |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁當(dāng)前第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁
SX-A Family FPGAs
2- 4
v5.3
Table 2-8 AC Specifications (5 V PCI Operation)
Symbol
Parameter
Condition
Min.
Max.
Units
IOH(AC)
Switching Current High
0 < VOUT ≤ 1.4
1
–44
–
mA
1.4
≤ V
OUT < 2.4
1, 2
(–44 + (VOUT – 1.4)/0.024)
–
mA
3.1 < VOUT < VCCI
1, 3
–
–
(Test Point)
VOUT = 3.1
3
––142
mA
IOL(AC)
Switching Current Low
VOUT ≥ 2.2
1
95
–
mA
2.2 > VOUT > 0.55
1
(VOUT/0.023)
–
mA
0.71 > VOUT > 0
1, 3
–
–
(Test Point)
VOUT = 0.71
3
–
206
mA
ICL
Low Clamp Current
–5 < VIN ≤ –1
–25 + (VIN + 1)/0.015
–
mA
slewR
Output Rise Slew Rate
0.4 V to 2.4 V load 4
15
V/ns
slewF
Output Fall Slew Rate
2.4 V to 0.4 V load 4
15
V/ns
Notes:
1. Refer to the V/I curves in Figure 2-1 on page 2-5. Switching current characteristics for REQ# and GNT# are permitted to be one half
of that specified here; i.e., half size output drivers may be used on these signals. This specification does not apply to CLK and RST#,
which are system outputs. “Switching Current High” specifications are not relevant to SERR#, INTA#, INTB#, INTC#, and INTD#,
which are open drain outputs.
2. Note that this segment of the minimum current curve is drawn from the AC drive point directly to the DC drive point rather than
toward the voltage rail (as is done in the pull-down curve). This difference is intended to allow for an optional N-channel pull-up.
3. Maximum current requirements must be met as drivers pull beyond the last step voltage. Equations defining these maximums (A
and B) are provided with the respective diagrams in Figure 2-1 on page 2-5. The equation defined maximum should be met by
design. In order to facilitate component testing, a maximum current test point is defined for each side of the output driver.
4. This parameter is to be interpreted as the cumulative edge rate across the specified range, rather than the instantaneous rate at any
point within the transition range. The specified load (diagram below) is optional; i.e., the designer may elect to meet this parameter
with an unloaded output per revision 2.0 of the PCI Local Bus Specification. However, adherence to both maximum and minimum
parameters is now required (the maximum is no longer simply a guideline). Since adherence to the maximum slew rate was not
required prior to revision 2.1 of the specification, there may be components in the market for some time that have faster edge
rates; therefore, motherboard designers must bear in mind that rise and fall times faster than this specification could occur and
should ensure that signal integrity modeling accounts for this. Rise slew rate does not apply to open drain outputs.
Output
Buffer
1/2 in. max.
50 pF
Pin
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A54SX08A-1FG144I | IC FPGA SX 12K GATES 144-FBGA |
| A3PE600-1FGG484 | IC FPGA 600000 GATES 484-FBGA |
| A3PE600-1FG484 | IC FPGA 600000 GATES 484-FBGA |
| GSC36DTES | CONN EDGECARD 72POS .100 EYELET |
| EP4CE30F29C6 | IC CYCLONE IV FPGA 30K 780FBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A54SX08A-1PQ208 | 功能描述:IC FPGA SX 12K GATES 208-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:SX-A 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA（17x17） |
| A54SX08A-1PQ208A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs |
| A54SX08A-1PQ208B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs |
| A54SX08A-1PQ208I | 功能描述:IC FPGA SX 12K GATES 208-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:SX-A 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA（17x17） |
| A54SX08A-1PQ208M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。