參數(shù)資料
型號(hào)： A43P26161V-95UF
廠商： AMIC Technology Corporation
英文描述： 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM
中文描述： 100萬(wàn)× 16位× 4個(gè)銀行的低功耗同步DRAM
文件頁(yè)數(shù)： 35/44頁(yè)
文件大?。?/td> 1122K
代理商： A43P26161V-95UF
A43P26161
PRELIMINARY (July, 2005, Version 1.1)
34
AMIC Technology, Corp.
Self Refresh Entry & Exit Cycle
* Note : TO ENTER SELF REFRESH MODE
1.
CS
,
RAS
&
CAS
and CKE should be low at the same clock cycle.
2. After 1 clock cycle, all the inputs including the system clock can be don’t care except for CKE.
3. The device remains in self refresh mode as long as CKE stays “Low”.
(cf.) Once the device enters self refresh mode, minimum tRAS is required before exit from self refresh.
TO EXIT SELF REFRESH MODE
4. System clock restart and be stable before returning CKE high.
5.
CS
starts from high.
6. Minimum tRC is required after CKE going high to complete self refresh exit.
7. 4K cycle of burst auto refresh is required before self refresh entry and after self refresh exit.
If the system uses burst refresh.
0
1
2
3
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5
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7
8
9
10
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12
13
14
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CLOCK
CKE
CS
RAS
CAS
ADDR
BS0, BS1
: Don't care
A10/AP
WE
Self Refresh Exit
Auto Refresh
DQM
DQ
Self Refresh Entry
t
SS
* Note 4
* Note 1
~
RC
min.
~
~
~
~
* Note 3
* Note 2
~
t
SS
* Note 6
~
~
* Note 5
~
~
* Note 7
* Note 7
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
Hi-Z
Hi-Z
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A43P2616G-75I 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Synchronous DRAM
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