參數(shù)資料
型號(hào)： A43P26161V-95U
廠商： AMIC Technology Corporation
英文描述： 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM
中文描述： 100萬(wàn)× 16位× 4個(gè)銀行的低功耗同步DRAM
文件頁(yè)數(shù)： 8/44頁(yè)
文件大?。?/td> 1122K
代理商： A43P26161V-95U
A43P26161
PRELIMINARY
(July, 2005, Version 1.1)
7
AMIC Technology, Corp.
Operating AC Parameter
(AC operating conditions unless otherwise noted)
Version
Symbol
Parameter
-75
-95
Unit
Note
t
RRD(min)
Row active to row active delay
2
2
CLK
1
t
RCD(min)
RAS to
CAS
delay
19
24
ns
1
t
RP(min)
Row precharge time
19
24
ns
1
t
RAS(min)
45
60
ns
1
t
RAS(max)
Row active time
100
100
μ
s
t
RC(min)
Row cycle time
64
84
ns
1
t
CDL(min)
Last data in new col. Address delay
7.5
9.5
ns
2
t
RDL(min)
Last data in row precharge
2
2
CLK
1, 2
t
BDL(min)
Last data in to burst stop
7.5
9.5
ns
2
t
CCD(min)
Col. Address to col. Address delay
7.5
9.5
ns
Note:
1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and
then rounding off to the next higher integer.
2. Minimum delay is required to complete write.
相關(guān)PDF資料
PDF描述
A43P26161G-75F OSC 3.3V SMT 7X5 CMOS
A43P26161G-75U 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM
A43P26161G-75UF 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM
A43P26161G-95 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM
A43P26161G-95F 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A43P26161V-95UF 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Low Power Synchronous DRAM
A43P2616G-75I 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Synchronous DRAM
A43P2616G-95I 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Synchronous DRAM
A43P2616V-75I 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Synchronous DRAM
A43P2616V-95I 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Synchronous DRAM
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