參數(shù)資料
型號: A43L2632V-6
廠商: AMIC Technology Corporation
英文描述: 1M X 32 Bit X 4 Banks Synchronous DRAM
中文描述: 100萬× 32位× 4個銀行同步DRAM
文件頁數(shù): 12/43頁
文件大小: 1072K
代理商: A43L2632V-6
A43L2632
PRELIMINARY
(January, 2005, Version 0.0)
11
AMIC Technology, Corp.
Mode Register Filed Table to Program Modes
Register Programmed with MRS
Address
BS1
BS0
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Function
0
0
RFU
W.B.L
TM
CAS Latency
BT
Burst Length
(Note 3) (Note 2) (Note 1)
Test Mode
CAS Latency
Burst Type
Burst Length
A8
A7
Type
A6
A5
A4
Latency
A3
Type
A2
A1
A0
BT=0
BT=1
0
0
Mode Register Set
0
0
0
Reserved
0
Sequential
0
0
0
1
1
0
1
0
0
1
1
1
Interleave
0
0
1
2
2
1
0
0
1
0
2
0
1
0
4
4
1
1
Vendor
Use
Only
0
1
1
3
0
1
1
8
8
Write Burst Length
1
0
0
Reserved
1
0
0
Reserved
Reserved
A9
Length
1
0
1
Reserved
1
0
1
Reserved
Reserved
0
Burst
1
1
0
Reserved
1
1
0
Reserved
Reserved
1
Single Bit
1
1
1
Reserved
1
1
1
256(Full)
Reserved
Note :
1. RFU(Reserved for Future Use) should stay “0” during MRS cycle.
2. If A9 is high during MRS cycle, “Burst Read Single Bit Write” function will be enabled.
3. BS0,BS1 must be 0,0 to select the Mode Register (vs. the Extended Mode Register).
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