參數資料
型號： A43L2616AG-7U
廠商： AMIC Technology Corporation
英文描述： 1M X 16 Bit X 4 Banks Synchronous DRAM
中文描述： 100萬× 16位× 4個銀行同步DRAM
文件頁數： 7/42頁
文件大小： 1119K
代理商： A43L2616AG-7U
A43L2616A
PRELIMINARY (November, 2004, Version 0.0)
6
AMIC Technology, Corp.
AC Operating Test Conditions
(VDD = 3.3V
±
0.3V, T
A
= 0
°
C to +70
°
C or T
A
= -40oC to +85oC)
Parameter
Value
AC input levels
V
IH
/V
IL
= 2.4V/0.4V
Input timing measurement reference level
1.4V
Input rise and all time (See note3)
tr/tf = 1ns/1ns
Output timing measurement reference level
1.4V
Output load condition
See Fig.2
Output
870
1200
(Fig. 1) DC Output Load Circuit
Z
O
=50
OUTPUT
50
V
TT
=1.4V
50pF
(Fig. 2) AC Output Load Circuit
3.3V
50pF
V
OH
(DC) = 2.4V, I
OH
= -2mA
V
OL
(DC) = 0.4V, I
OL
= 2mA
AC Characteristics
(AC operating conditions unless otherwise noted)
-6
-7
Symbol
Parameter
CAS Latency
Min
Max
Min
Max
Unit
Note
t
CC
CLK cycle time
6
1000
7
1000
ns
1
t
SAC
CLK to valid
Output delay
-
5
-
5.4
ns
1,2
t
OH
Output data hold time
2.5
-
2.7
-
ns
2
t
CH
CLK high pulse width
3
2.5
-
2.5
-
ns
3
t
CL
CLK low pulse width
2.5
-
2.5
-
ns
3
t
SS
Input setup time
2
-
2
-
ns
3
t
SH
Input hold time
1
-
1
-
ns
3
t
SLZ
CLK to output in Low-Z
1
-
1
-
ns
2
t
SHZ
CLK to output In Hi-Z
3
-
5.5
-
6
ns
*All AC parameters are measured from half to half.
Note :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5) ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e.,
[
(tr + tf)/2-1
]
ns should be added to the parameter.
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相關代理商/技術參數
參數描述
A43L2616AG-7UF 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Synchronous DRAM
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A43L2616AV-6F 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Synchronous DRAM
A43L2616AV-6U 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Synchronous DRAM
A43L2616AV-6UF 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Synchronous DRAM
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