參數(shù)資料
型號(hào)： A42U2604V-60U
廠商： AMIC Technology Corporation
英文描述： 4M X 4 CMOS DYNAMIC RAM WITH EDO PAGE MODE
中文描述： 4米× 4的CMOS動(dòng)態(tài)RAM與江戶頁(yè)面模式
文件頁(yè)數(shù)： 8/25頁(yè)
文件大?。?/td> 265K
代理商： A42U2604V-60U
A42U2604 Series
PRELIMINARY
(June, 2002, Version 0.3)
7
AMIC Technology, Inc.
AC Characteristics
(continued)
(VCC = 2.5V
±
10%, VSS = 0V, Ta = 0
°
C to +70
°
C or -40
°
C to +85
°
C)
Test Conditions:
Input timing reference level: V
IH
/V
IL
=1.8V/0.8V
Output reference level: V
OH
/V
OL
=1.6V/0.8V
Output Load: 1TTL gate + CL (100pF)
Assumed t
T
=2ns
-50
-60
-80
#
Std
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
Notes
20
t
RRH
Read Command Hold Time Reference
to
RAS
0
-
0
-
0
-
ns
9
21
t
RAL
Column Address to
RAS
Lead Time
22
-
27
-
37
-
ns
22
t
COH
Output Hold After
CAS
Low
3
-
4
-
5
-
ns
23
t
OFF
Output Buffer Turn-Off Delay Time
-
3
-
5
-
10
ns
8, 10
24
t
ASC
Column Address Setup Time
0
-
0
-
0
-
ns
25
t
CAH
Column Address Hold Time
8
-
10
-
14
-
ns
26
t
OES
OE
Low to
CAS
High Set Up
10
-
10
-
10
-
ns
27
t
WCS
Write Command Setup Time
0
-
0
-
0
-
ns
11
28
t
WCH
Write Command Hold Time
8
-
10
-
14
-
ns
11
29
t
WCR
Write Command Hold Time to
RAS
45
-
55
-
74
-
ns
30
t
WP
Write Command Pulse Width
8
-
10
-
14
-
ns
31
t
RWL
Write Command to
RAS
Lead Time
13
-
15
-
20
-
ns
32
t
CWL
Write Command to
CAS
Lead Time
8
-
10
-
14
-
ns
33
t
DS
Data-in setup Time
0
-
0
-
0
-
ns
34
t
DH
Data-in Hold Time
8
-
10
-
14
-
ns
35
t
DHR
Data-in Hold Time to
RAS
45
-
55
-
74
-
ns
36
t
RWC
Read-Modify-Write Cycle Time
114
-
135
-
179
-
ns
37
t
RWD
RAS
to
WE
Delay Time (Read-Modify-
Write)
65
-
78
-
105
-
ns
11
38
t
CWD
CAS
to
WE
Delay Time (Read-Modify-
Write)
28
-
33
-
45
-
ns
11
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PDF描述
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