參數(shù)資料
型號: A42MX36-3BG100B
廠商: Electronic Theatre Controls, Inc.
英文描述: Hex Inverters 14-SSOP -40 to 85
中文描述: 40MX和42MX FPGA系列
文件頁數(shù): 122/123頁
文件大?。?/td> 854K
代理商: A42MX36-3BG100B
FPGA Families 40MX and 42MX
3-2
v6.0
Datasheet Categories
In order to provide the latest information to designers, some datasheets are published before data has been fully
characterized. Datasheets are designated as "Product Brief," "Advanced," "Production," and "Datasheet
Supplement." The definitions of these categories are as follows:
Product Brief
The product brief is a summarized version of a datasheet (advanced or production) containing general product
information. This brief gives an overview of specific device and family information.
Advanced
This datasheet version contains initial estimated information based on simulation, other products, devices, or speed
grades. This information can be used as estimates, but not for production.
Unmarked (production)
This datasheet version contains information that is considered to be final.
Datasheet Supplement
The datasheet supplement gives specific device information for a derivative family that differs from the general family
datasheet. The supplement is to be used in conjunction with the datasheet to obtain more detailed information and
for specifications that do not differ between the two families.
5.1
In the
160-Pin PQFP
table, the following pins changed:
Pin 61 (42MX09, 42MX16, and 42MX64) has changed to LP
2-10
In the
208-Pin PQFP
table, the following pins changed:
Pin 129 (42MX09, 42MX16, and 42MX64) has changed to LP
Pin 198 (42MX09) has changed to I/O
2-14
The n the
240-Pin PQFP
table, the following pins changed:
Pin 91 (42MX36) has changed to LP
2-18
In the
100-Pin VQFP Package
table, the following pins changed:
Pin 62 (42MX09 and 42MX16) has changed to LP
2-23
In the
176-Pin TQFP
table, the following pins changed:
Pin 109 (42MX09 and 42MX16) has changed to LP
2-25
In the
272-Pin PBGA
table, the following pins changed:
Pin K20 (42MX36) has changed to LP
2-35
v5.0
The
"Low Power Mode" section
was updated.
1-7
Footnote 8 in the
Table 9 5V TTL Electrical Specifications
was updated.
1-15
Footnote 8 in the
Table 13 3.3V LVTTL Electrical Specifications
was updated.
1-17
v4.0.1
Because the changes in this data sheet are extensive and technical in nature, this should be viewed
as a new document. Please read it as you would a data sheet that is published for the first time.
ALL
Note that the “Package Characteristics and Mechanical Drawings” section has been eliminated
from the data sheet. The mechanical drawings are now contained in a separate document,
“Package Characteristics and Mechanical Drawings,” available on the Actel web site.
Previous version
Changes in current version (v6.0)
Page
相關(guān)PDF資料
PDF描述
A42MX36-3BG100ES Hex Inverters 14-SSOP -40 to 85
A42MX36-3BG100I Hex Inverters 14-SSOP -40 to 85
A42MX36-3BG100M Hex Inverters 14-SOIC -40 to 85
A42MX36-3CQ100 Hex Inverters 14-SOIC -40 to 85
A42MX36-3CQ100A Hex Inverters 14-SOIC -40 to 85
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A42MX36-3BGG272 功能描述:IC FPGA MX SGL CHIP 54K 272-PBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:MX 標(biāo)準包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP,帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP(75x75)
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