參數(shù)資料
型號: A42MX16-3VQG100I
廠商: Microsemi SoC
文件頁數(shù): 74/142頁
文件大?。?/td> 0K
描述: IC FPGA MX SGL CHIP 24K 100-VQFP
標(biāo)準(zhǔn)包裝: 90
系列: MX
輸入/輸出數(shù): 83
門數(shù): 24000
電源電壓: 3 V ~ 3.6 V,4.5 V ~ 5.5 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TQFP
供應(yīng)商設(shè)備封裝: 100-VQFP(14x14)
40MX and 42MX FPGA Families
Re vi s i on 11
1 - 33
Decode Module Timing
SRAM Timing Characteristics
Dual-Port SRAM Timing Waveforms
Figure 1-27 Decode Module Timing
Figure 1-28 SRAM Timing Characteristics
Note:
Identical timing for falling edge clock.
Figure 1-29 42MX SRAM Write Operation
A–G, H
Y
t
PLH
50%
t
PHL
Y
A
B
C
D
E
F
G
H
WRAD [5:0]
BLKEN
WEN
WCLK
RDAD [5:0]
LEW
REN
RCLK
RD [7:0]
WD [7:0]
Write Port
Read Port
RAM Array
3 2x8 or 64x4
(2 56 Bits)
WCLK
WD[7:0]
WRAD[5:0]
WEN
BLKEN
Valid
t
RCKHL
t
RCKHL
t
WENSU
t
BENSU
t
WENH
t
BENH
t
ADSU
t
ADH
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