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參數(shù)資料
| 型號(hào)： | A42MX16-1PQ160I |
| 英文描述： | Field Programmable Gate Array (FPGA) |
| 中文描述： | 現(xiàn)場(chǎng)可編程門陣列（FPGA） |
| 文件頁數(shù)： | 7/116頁 |
| 文件大?。?/td> | 3110K |
| 代理商： | A42MX16-1PQ160I |
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v5.0
7
40MX and 42MX FPGA Families
Some of the 42MX devices contain D-modules, which are
arranged around the periphery of the devices. D-modules
contain wide-decode circuitry, which provides a fast,
wide-input AND function similar to that found in
product-term architectures (
Figure 4
). The D-module
allows 42MX devices to perform wide-decode functions at
speeds comparable to CPLDs and PALs. The output of the
D-module has a programmable inverter for active HIGH or
LOW assertion. The D-module output is hard-wired to an
output pin, but it can also be fed back into the array to be
incorporated into other logic.
Dual-Port SRAM Modules
The A42MX36 device contains dual-port SRAM modules that
have been optimized for synchronous or asynchronous
applications. The SRAM modules are arranged in 256-bit
blocks that can be configured as 32x8 or 64x4. SRAM
modules can be cascaded together to form memory spaces
of user-definable width and depth. A block diagram of the
42MX dual-port SRAM block is shown in
Figure 5
.
The 42MX SRAM modules are true dual-port structures
containing independent read and write ports. Each SRAM
module contains six bits of read and write addressing
(RDAD[5:0] and WRAD[5:0], respectively) for 64x4-bit
blocks. When configured in byte mode, the highest order
address bits (RDAD5 and WRAD5) are not used. The read
and write ports of the SRAM block contain independent
clocks (RCLK and WCLK) with programmable polarities
offering active HIGH or LOW implementation. The SRAM
block contains eight data inputs (WD[7:0]), and eight
outputs (RD[7:0]) which are connected to segmented
vertical routing tracks.
The 42MX dual-port SRAM blocks provide an optimal
solution for high-speed buffered applications requiring fast
FIFO and LIFO queues. Actel
’
s ACTgen Macro Builder
provides the capability to quickly design memory functions,
such as FIFOs, LIFOs, and RAM arrays. In addition, unused
SRAM blocks can be used to implement registers for other
logic within the design.
Figure 4
D-Module Implementation
7 Inputs
Hard-Wire to I/O
Feedback to Array
Programmable
Inverter
Figure 5
42MX Dual-Port SRAM Block
SRAM Module
32 x 8 or 64 x 4
(256 Bits)
Read
Port
Logic
Write
Port
Logic
RD[7:0]
Routing Tracks
Latches
Read
Logic
[5:0]
RDAD[5:0]
REN
RCLK
Latches
WD[7:0]
Latches
WRAD[5:0]
Write
Logic
MODE
BLKEN
WEN
WCLK
[5:0]
[7:0]
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A42MX16-1PQ160M | Field Programmable Gate Array (FPGA) |
| A42MX16-1PQ208 | Field Programmable Gate Array (FPGA) |
| A42MX16-1PQ208I | Field Programmable Gate Array (FPGA) |
| A42MX16-1PQ208M | Field Programmable Gate Array (FPGA) |
| A42MX16-1TQ176 | Field Programmable Gate Array (FPGA) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A42MX16-1PQ160M | 制造商:Microsemi Corporation 功能描述:FPGA 24K GATES 608 CELLS 119MHZ/198MHZ 0.45UM 3.3V/5V 160PQF - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 125 I/O 160PQFP |
| A42MX16-1PQ208 | 功能描述:IC FPGA MX SGL CHIP 24K 208-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:MX 標(biāo)準(zhǔn)包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計(jì):- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA（27X27） |
| A42MX16-1PQ208I | 功能描述:IC FPGA MX SGL CHIP 24K 208-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:MX 標(biāo)準(zhǔn)包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計(jì):- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA（27X27） |
| A42MX16-1PQ208M | 制造商:Microsemi Corporation 功能描述:FPGA 24K GATES 608 CELLS 119MHZ/198MHZ 0.45UM 3.3V/5V 208PQF - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 140 I/O 208PQFP |
| A42MX16-1PQG100 | 功能描述:IC FPGA MX SGL CHIP 24K 100-PQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:MX 標(biāo)準(zhǔn)包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計(jì):- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA（27X27） |
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