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參數(shù)資料
| 型號： | A42MX09-2VQG100I |
| 廠商： | Microsemi SoC |
| 文件頁數(shù)： | 47/142頁 |
| 文件大小： | 0K |
| 描述： | IC FPGA MX SGL CHIP 14K 100VQFP |
| 標準包裝： | 90 |
| 系列： | MX |
| 輸入/輸出數(shù)： | 83 |
| 門數(shù)： | 14000 |
| 電源電壓： | 3 V ~ 3.6 V，4.5 V ~ 5.5 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 100-TQFP |
| 供應(yīng)商設(shè)備封裝： | 100-VQFP（14x14） |
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Datasheet Information
3- 2
R ev isio n 1 1
v6.0
(continued)
Absolute Maximum Ratings for 40MX Devices* were updated.
The Table 1-9 5V TTL Electrical Specifications was updated.
The Table 1-13 3.3V LVTTL Electrical Specifications was updated.
and
Table 1-16 Mixed 5.0V/3.3V Electrical Specifications were updated.
Table 1-17 DC Specification (5.0 V PCI Signaling)1 was updated.
Table 1-19 DC Specification (3.3 V PCI Signaling)1 was updated.
and the tables were updated.
Figure 1-16 40MX Timing Model* was updated.
updated.
Figure 1-19 42MX Timing Model (SRAM Functions) was updated.
Figure 1-26 Output Buffer Latches was updated.
The "Pin Descriptions" section was updated.
In the "PQ100" table, Pin 64 (42MX09 and 42MX16) has changed to LP.
In the "PQ160" table, Pin 61 (42MX09, 42MX16, and 42MX64) has changed to LP.
In the "PQ208" table, the following pins changed:
Pin 129 (42MX09, 42MX16, and 42MX64) has changed to LP.
Pin 198 (42MX09) has changed to I/O.
The n the "PQ240" table, Pin 91 (42MX36) has changed to LP.
In the "VQ100" table, Pin 62 (42MX09 and 42MX16) has changed to LP.
In the "TQ176" table, Pin 109 (42MX09 and 42MX16) has changed to LP.
In the "BG272" table, Pin K20 (42MX36) has changed to LP.
v5.1
The "Low Power Mode" section was updated.
Footnote 8 in Table 1-9 5V TTL Electrical Specifications was updated.
Footnote 8 in Table 1-13 3.3V LVTTL Electrical Specifications was updated.
v5.0
Because the changes in this data sheet are extensive and technical in nature, this
should be viewed as a new document. Please read it as you would a datasheet that is
published for the first time.
ALL
Note that the “Package Characteristics and Mechanical Drawings” section has been
eliminated from the datasheet. The mechanical drawings are now contained in a
separate document, Package Mechanical Drawings, available on the Microsemi SoC
Products Group website.
Revision
Changes
Page
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A42MX09-2VQ100I | IC FPGA MX SGL CHIP 14K 100VQFP |
| A54SX16-VQG100 | IC FPGA SX 24K GATES 100-VQFP |
| A54SX16-VQ100 | IC FPGA SX 24K GATES 100-VQFP |
| ACC43DRXI-S734 | CONN EDGECARD 86POS DIP .100 SLD |
| RSC49DRAN | CONN EDGECARD 98POS R/A .100 SLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A42MX09-3BG100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX09-3BG100A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX09-3BG100B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX09-3BG100ES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX09-3BG100I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
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