參數(shù)資料
型號: A42MX09-1PL84I
英文描述: Field Programmable Gate Array (FPGA)
中文描述: 現(xiàn)場可編程門陣列(FPGA)
文件頁數(shù): 13/116頁
文件大?。?/td> 3110K
代理商: A42MX09-1PL84I
v5.0
13
40MX and 42MX FPGA Families
5.0V Operating Conditionsand Mixed 5.0V/3.3V Operating Conditions
Absolute Maximum Ratings
1
Free Air Temperature Range
Symbol Parameter
Limits
Units
V
CCA
/
V
CCI
V
I
V
O
T
STG
Notes:
1.
DC Supply Voltage
0.5 to +7.0
V
Input Voltage
0.5 to V
CC
+0.5
0.5 to V
CC
+0.5
65 to +150
V
Output Voltage
V
Storage Temperature
°
C
Stresses beyond those listed under
Absolute Maximum
Ratings
may cause permanent damage to the device.
Exposure to absolute maximum rated conditions for extended
periods may affect device reliability. Devices should not be
operated outside the Recommended Operating Conditions.
Device inputs are normally high impedance and draw
extremely low current. However, when input voltage is greater
than V
CCA
+ 0.5V or less than GND
0.5V, the internal
protection diode will be forward-biased and can draw
excessive current.
2.
Recommended Operating Conditions
Parameter
Commercial Industrial
Military
Units
Temperature
Range
1
0 to +70
40 to +85
55 to +125
°
C
Power Supply
Tolerance
±5
±10
±10
%V
CC
V
V
CCI
V
CCA
V
CCI2
Notes:
1.
4.75 to 5.25
4.5 to 5.5
4.5 to 5.5
4.75 to 5.25
4.5 to 5.5
4.5 to 5.5
V
3.14 to 3.47
3.0 to 3.6
3.0 to 3.6
V
Ambient temperature (T
A
) is used for commercial and
industrial; case temperature (T
C
) is used for military.
Operating condition for I/Os in mixed voltage mode.
2.
Electrical Specifications
Symbol
Parameter
Commercial
Commercial
‘–
F
Industrial
Military
Units
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
V
OH1
(I
OH
=
10 mA)
2
TTL
(I
OH
=
6 mA) TTL
(I
OH
=
4 mA) TTL
(I
OL
= 10 mA)
2
TTL
(I
OL
= 6 mA) TTL
2.4
2.4
V
V
3.7
3.7
V
V
OL1
0.5
0.5
V
0.40
0.40
V
V
IL
V
IH
I
IL
I
IH
Input Transition Time t
R
, t
F2
C
IO
I/O Capacitance
2, 3
Standby Current, I
CC4
I
CC(D)
Dynamic V
CCI
Supply Current
Low Power Mode Standby Current
Notes:
1.
Only one output tested at a time. V
CCI
= min.
2.
Not tested, for information only.
3.
Includes worst-case 84-pin PLCC package capacitance. V
OUT
= 0 V, f = 1 MHz.
4.
All outputs unloaded. All inputs = V
CCI
or GND. I
CC
limit includes I
PP
and I
SV
during normal operation.
5.
A40MX02 and A40MX04 I
CC
= 3 mA, A42MX09 I
CC
= 5 mA, A42MX16 I
CC
= 6 mA, A42MX24, A42MX24A, and A42MX36 I
CC
= 25 mA.
6.
I
CC
Max = 2 mA is available by special request. Contact your local Actel Sales representative for additional information.
7.
A40MX02 and A40MX04 I
CC
= 10 mA, A42MX09, A42MX16, A42MX24, A42MX24A, and A42MX36 I
CC
= 25 mA.
8.
In Low Power Mode, A42MX09 I
CC
= 50 μA; A42MX16, A42MX24, and A42MX36 I
CC
= 100 μA. A40MX02 and A40MX04 = N/A.
0.3
0.8
0.3
0.8
0.3
0.8
0.3
0.8
V
2.0
V
CCI
+ 0.3
10
2.0
V
CCI
+ 0.3
10
2.0
V
CCI
+ 0.3
10
2.0
V
CCI
+ 0.3
10
V
(V
IN
= 0.5)
(V
IN
= 2.7)
μA
10
10
10
10
μA
500
500
500
500
ns
10
10
10
10
pF
Notes 5 & 6
25.0
Notes 6 & 7
25
mA
See the
Power Dissipation
section on
page 18
.
Note 8
I
CC
0.5
I
CC
0.5
I
CC
0.5
mA
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