參數(shù)資料
型號： A42MX04-1PQ100
廠商： Electronic Theatre Controls, Inc.
英文描述： Audio Transformer; Power Rating:100mW; Mounting Type:PCB Surface; Current Rating:4mA; External Depth:0.594"; External Height:0.625"; External Width:0.813"; Frequency Response Max:15kHz; Frequency Response Min:200Hz
中文描述： 40MX和42MX FPGA系列
文件頁數(shù)： 88/123頁
文件大?。?/td> 854K
代理商： A42MX04-1PQ100
40MX and 42MX FPGA Families
v6.0
1-61
TTL Output Module Timing5
tDLH
Data-to-Pad HIGH
3.5
3.9
4.4
5.2
7.3
ns
tDHL
Data-to-Pad LOW
4.1
4.6
5.2
6.1
8.6
ns
tENZH
Enable Pad Z to HIGH
3.8
4.2
4.8
5.6
7.8
ns
tENZL
Enable Pad Z to LOW
4.2
4.6
5.3
6.2
8.7
ns
tENHZ
Enable Pad HIGH to Z
7.6
8.4
9.5
11.2
15.7
ns
tENLZ
Enable Pad LOW to Z
7.0
7.8
8.8
10.4
14.5
ns
tGLH
G-to-Pad HIGH
4.8
5.3
6.0
7.2
10.0
ns
tGHL
G-to-Pad LOW
4.8
5.3
6.0
7.2
10.0
ns
tLCO
I/O Latch Clock-to-Out (Pad-to-
Pad), 64 Clock Loading
8.0
8.9
10.1
11.9
16.7
ns
tACO
Array Clock-to-Out (Pad-to-Pad),
64 Clock Loading
11.3
12.5
14.2
16.7
23.3
ns
dTLH
Capacitive Loading, LOW to HIGH
0.04
0.05
0.06
0.08
ns/pF
dTHL
Capacitive Loading, HIGH to LOW
0.05
0.06
0.07
0.10
ns/pF
CMOS Output Module Timing5
tDLH
Data-to-Pad HIGH
4.5
5.0
5.6
6.6
9.3
ns
tDHL
Data-to-Pad LOW
3.4
3.8
4.3
5.1
7.1
ns
tENZH
Enable Pad Z to HIGH
3.8
4.2
4.8
5.6
7.8
ns
tENZL
Enable Pad Z to LOW
4.2
4.6
5.3
6.2
8.7
ns
tENHZ
Enable Pad HIGH to Z
7.6
8.4
9.5
11.2
15.7
ns
tENLZ
Enable Pad LOW to Z
7.0
7.8
8.8
10.4
14.5
ns
tGLH
G-to-Pad HIGH
7.1
7.9
8.9
10.5
14.7
ns
tGHL
G-to-Pad LOW
7.1
7.9
8.9
10.5
14.7
ns
tLCO
I/O Latch Clock-to-Out (Pad-to-
Pad), 64 Clock Loading
8.0
8.9
10.1
11.9
16.7
ns
tACO
Array Clock-to-Out (Pad-to-Pad),
64 Clock Loading
11.3
12.5
14.2
16.7
23.3
ns
dTLH
Capacitive Loading, LOW to HIGH
0.04
0.05
0.06
0.08
ns/pF
dTHL
Capacitive Loading, HIGH to LOW
0.05
0.06
0.07
0.10
ns/pF
Table 35
A42MX16 Timing Characteristics (Nominal 3.3V Operation) (Continued)
(Worst-Case Commercial Conditions, VCCA = 3.0V, TJ = 70°C)
‘–3’ Speed
‘–2’ Speed
‘–1’ Speed
‘Std’ Speed
‘–F’ Speed
Parameter Description
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max. Units
Notes:
1. For dual-module macros use tPD1 + tRD1 + taped, to + tRD1 + taped, or tPD1 + tRD1 + tusk, whichever is appropriate.
2. Routing delays are for typical designs across worst-case operating conditions. These parameters should be used for estimating
device performance. Post-route timing analysis or simulation is required to determine actual performance.
3. Data applies to macros based on the S-module. Timing parameters for sequential macros constructed from C-modules can be
obtained from the Timer utility.
4. Set-up and hold timing parameters for the input buffer latch are defined with respect to the PAD and the D input. External setup/
hold timing parameters must account for delay from an external PAD signal to the G inputs. Delay from an external PAD signal to
the G input subtracts (adds) to the internal setup (hold) time.
5. Delays based on 35 pF loading.
相關PDF資料
PDF描述
A42MX09-1PQ100 Audio Transformer; Power Rating:100mW; Mounting Type:PCB Surface; Current Rating:4mA; External Depth:0.594"; External Height:0.625"; External Width:0.813"; Frequency Response Max:15kHz; Frequency Response Min:200Hz
A42MX16-1PQ100 Audio Transformer; Power Rating:100mW; Mounting Type:PCB Surface; Current Rating:4mA; External Depth:0.594"; External Height:0.625"; External Width:0.813"; Frequency Response Max:15kHz; Frequency Response Min:200Hz RoHS Compliant: Yes
A42MX24-1PQ100 40MX and 42MX FPGA Families
A42MX02-1PQ100A Audio Transformer; Power Rating:1W; Mounting Type:PCB Surface; External Depth:1.125"; External Height:1.125"; External Width:1.375"; Frequency Response Max:15kHz; Frequency Response Min:200Hz; Leaded Process Compatible:Yes
A42MX04-1PQ100A Line Matching Transformer; Leaded Process Compatible:Yes; Insertion Loss:0.8dBA; Peak Reflow Compatible (260 C):Yes
相關代理商/技術參數(shù)
參數(shù)描述
A42MX04-1PQ100A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families
A42MX04-1PQ100B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families
A42MX04-1PQ100ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families
A42MX04-1PQ100I 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families
A42MX04-1PQ100M 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families
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