- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄362022 > A40MX04-FPL44I Field Programmable Gate Array (FPGA) PDF資料下載
參數(shù)資料
| 型號(hào)： | A40MX04-FPL44I |
| 英文描述： | Field Programmable Gate Array (FPGA) |
| 中文描述： | 現(xiàn)場(chǎng)可編程門(mén)陣列（FPGA） |
| 文件頁(yè)數(shù)： | 2/116頁(yè) |
| 文件大小： | 3110K |
| 代理商： | A40MX04-FPL44I |
第1頁(yè)當(dāng)前第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)
40MX and 42MX FPGA Families
2
v5.0
General Description
Actel
’
s
40MX
high-performance, single-chip solution for shortening the
system design and development cycle, offering a
cost-effective alternative to ASICs. The 40MX and 42MX
devices are excellent choices for integrating logic that is
currently implemented in multiple PALs, CPLDs, and
FPGAs.
Example
applications
controllers and address decoding, peripheral bus interfaces,
DSP, and co-processor functions.
The MX device architecture is based on Actel
’
s patented
antifuse technology implemented in a 0.45μ triple-metal
CMOS process. With capacities ranging from 3,000 to 54,000
system gates, the synthesis-friendly MX devices provide
performance up to 250 MHz, are live on power-up, and
require up to five times lower stand-by power consumption
than any other FPGA device. Actel
’
s MX FPGAs provide up
to 202 user I/Os and are available in a wide variety of
packages and speed grades.
Actel
’
s 42MX devices also feature MultiPlex I/Os, which
support mixed voltage systems, enable programmable PCI,
deliver high-performance operation at both 5.0V and 3.3V,
and provide a low-power mode.
The MX PCI-Compliant devices are fully compliant with the
PCI Local Bus Specification (version 2.1). They deliver 200
and
42MX
families
provide
a
include
high-speed
MHz on-chip operation and 6.1 ns clock-to-output
performance with capacities spanning from 36,000 to 54,000
system gates. MX devices comply 100 percent to the
electrical and timing specifications detailed in the PCI
specification. However, as with all programmable logic
devices, the performance of the final product depends upon
the user's design and optimization techniques.
The MX24 and MX36 devices also include system-level
features such as IEEE Standard 1149.1 (JTAG) Boudary
Scan Testing, dual-port SRAM, and fast wide-decode
modules. The A42MX36 device offers dual-port SRAM for
implementing fast FIFOs, LIFOs, and temporary data
storage. The large number of storage elements can
efficiently address applications requiring wide datapath
manipulation and can perform transformation functions
such as those required for telecommunications, networking,
and DSP.
All products in the 40MX and 42MX families are available
100 percent tested over the military temperature range. In
addition, the largest member of the family, the A42MX36, is
available in both CQ208 and CQ256 ceramic packages
screened to MIL-STD-883 levels. For easy prototyping and
conversion from plastic to ceramic, the CQ208 and PQ208
devices are pin compatible.
Ordering Information
Application (Temperature Range)
Blank =
Commercial (0 to +70
°
C)
I = Industrial (
–
40 to +85
°
C)
M = Military (
–
55 to +125
°
C)
B = MIL-STD-883
Package Type
PL = Plastic Leaded Chip Carrier
PQ = Plastic Quad Flat Pack
TQ = Thin (1.4 mm) Quad Flat Pack
VQ = Very Thin (1.0 mm) Quad Flat Pack
BG = Ball Grid Array
CQ = Ceramic Quad Flat Pack
Speed Grade
Blank = Standard Speed
–
1 = Approximately 15% Faster than Standard
–
2 = Approximately 25% Faster than Standard
–
3 = Approximately 35% Faster than Standard
–
F = Approximately 40% Slower than Standard
Part Number
A40MX02= 3,000 System Gates
A40MX04= 6,000 System Gates
A42MX09= 14,000 System Gates
A42MX16= 24,000 System Gates
A42MX24= 36,000 System Gates
A42MX36= 54,000 System Gates
Package Lead Count
A42MX16
–
PQ
100
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A40MX04-PL84 | Field Programmable Gate Array (FPGA) |
| A40MX04-PL84I | Field Programmable Gate Array (FPGA) |
| A40MX04-PL84M | Field Programmable Gate Array (FPGA) |
| A40MX04-PQ100 | Field Programmable Gate Array (FPGA) |
| A40MX04-PQ100I | Field Programmable Gate Array (FPGA) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A40MX04-FPL44M | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Field Programmable Gate Array (FPGA) |
| A40MX04-FPL68 | 功能描述:IC FPGA MX SGL CHIP 6K 68-PLCC RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:MX 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門(mén)數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類(lèi)型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| A40MX04-FPL68I | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Field Programmable Gate Array (FPGA) |
| A40MX04-FPL68M | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Field Programmable Gate Array (FPGA) |
| A40MX04-FPL84 | 功能描述:IC FPGA MX SGL CHIP 6K 84-PLCC RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:MX 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門(mén)數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類(lèi)型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。