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參數(shù)資料
| 型號： | A3PN030-Z1VQG100 |
| 廠商： | Microsemi SoC |
| 文件頁數(shù)： | 10/114頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA NANO 30K GATES 100-VQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | ProASIC3 nano |
| 輸入/輸出數(shù)： | 77 |
| 門數(shù)： | 30000 |
| 電源電壓： | 1.425 V ~ 1.575 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 100-TQFP |
| 供應(yīng)商設(shè)備封裝： | 100-VQFP（14x14） |
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Revision 11
5-1
5 – Datasheet Information
List of Changes
The following table lists critical changes that were made in each revision of the ProASIC3 nano
datasheet.
Revision
Changes
Page
Revision 11
(January 2013)
The "ProASIC3 nano Ordering Information" section has been updated to mention "Y"
as "Blank" mentioning "Device Does Not Include License to Implement IP Based on
the Cryptography Research, Inc. (CRI) Patent Portfolio" (SAR 43219).
Added a Note stating "VMV pins must be connected to the corresponding VCCI pins. See
the "VMVx I/O Supply Voltage (quiet)" section on page 3-1 for further information.
" to
Table 2-1 Absolute Maximum Ratings (SAR 38326).
Added a note to Table 2-2 Recommended Operating Conditions 1, 2 (SAR 43646):
The programming temperature range supported is Tambient = 0°C to 85°C.
The note in Table 2-73 ProASIC3 nano CCC/PLL Specification referring the reader to
SmartGen was revised to refer instead to the online help associated with the core
(SAR 42570).
Figure 2-32 FIFO Read and Figure 2-33 FIFO Write are new (SAR 34847).
Libero Integrated Design Environment (IDE) was changed to Libero System-on-Chip
(SoC) throughout the document (SAR 40288).
Live at Power-Up (LAPU) has been replaced with ’Instant On’.
NA
Revision 10
(September 2012)
The "Security" section was modified to clarify that Microsemi does not support read-
back of programmed data.
Revision 9
(March 2012)
revised to clarify that although no existing security measures can give an absolute
guarantee, Microsemi FPGAs implement the best security available in the industry
(SAR 34668).
Notes indicating that A3P015 is not recommended for new designs have been added
(SAR 36761).
Notes indicating that nano-Z devices are not recommended for use in new designs
have been added. The "Devices Not Recommended For New Designs" section is new
(SAR 36702).
The Y security option and Licensed DPA Logo were added to the "ProASIC3 nano
Ordering Information" section. The trademarked Licensed DPA Logo identifies that a
product is covered by a DPA counter-measures license from Cryptography Research
(SAR 34726).
Corrected the Commercial Temperature range to reflect a range of 0°C to 70°C
instead of –20°C to 70°C in the "ProASIC3 nano Ordering Information", "Temperature
Grade Offerings", and the "Speed Grade and Temperature Grade Matrix" sections
(SAR 37097).
The following sentence was removed from the "Advanced Architecture" section: "In
addition, extensive on-chip programming circuitry enables rapid, single-voltage (3.3 V)
programming of IGLOO nano devices via an IEEE 1532 JTAG interface" (SAR 34688).
The "Specifying I/O States During Programming" section is new (SAR 34698).
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| A3PN030-Z1VQG100I | 功能描述:IC FPGA NANO 30K GATES 100-VQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| A3PN030-Z2QNG48 | 功能描述:IC FPGA NANO 30K GATES 48-QFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| A3PN030-Z2QNG48I | 功能描述:IC FPGA NANO 30K GATES 48-QFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| A3PN030-Z2QNG68 | 功能描述:IC FPGA NANO 30K GATES 68-QFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| A3PN030-Z2QNG68I | 功能描述:IC FPGA NANO 30K GATES 68-QFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
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