- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄253905 > A3PN030-QN48 FPGA, 768 CLBS, 30000 GATES, QCC48 PDF資料下載
參數(shù)資料
| 型號： | A3PN030-QN48 |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 768 CLBS, 30000 GATES, QCC48 |
| 封裝： | 6 X 6 MM, 0.90 HEIGHT, 0.40 MM PITCH, QFN-48 |
| 文件頁數(shù)： | 4/92頁 |
| 文件大?。?/td> | 3184K |
| 代理商： | A3PN030-QN48 |
第1頁第2頁第3頁當(dāng)前第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁
ProASIC3 nano Device Overview
1- 8
A d vance v0.4
Part Number and Revision Date
Part Number 51700111-001-3
Revised February 2009
List of Changes
The following table lists critical changes that were made in the current version of the document.
Previous Version
Changes in Current Version (Advance v0.4)
Page
Advance v0.3
(November 2008)
Table 1 ProASIC3 nano Devices was revised to change the maximum user I/Os for
A3PN020 and A3PN030. The following table note was removed: "Six chip (main)
and three quadrant global networks are available for A3PN060 and above."
The QN100 package was removed for all devices.
N/A
The "Device Marking" section is new.
Advance v0.2
(October 2008)
The A3PN030 device was added to product tables and replaces A3P030 entries
that were formerly in the tables.
The "Wide Range I/O Support" section is new.
Advance v0.1
(October 2008)
The "I/Os Per Package" table was updated to add the following information to
table note 4: "For nano devices, the VQ100 package is offered in both leaded and
RoHS-compliant versions. All other packages are RoHS-compliant only."
updated to remove QN100 for A3PN250.
The "General Description" section was updated to give correct information
about number of gates and dual-port RAM for ProASIC3 nano devices.
The device architecture figures, Figure 1-3 ProASIC3 nano Device Architecture
through
(A3PN250), were revised. Figure 1-1 ProASIC3 Device Architecture Overview
through
The "PLL and CCC" section was revised to include information about CCC-GLs in
A3PN020 and smaller devices.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A3PN030-QN68I | FPGA, 768 CLBS, 30000 GATES, QCC68 |
| A3PN030-QN68 | FPGA, 768 CLBS, 30000 GATES, QCC68 |
| A3PN030-Z1QN48I | FPGA, 768 CLBS, 30000 GATES, QCC48 |
| A3PN030-Z1QN48 | FPGA, 768 CLBS, 30000 GATES, QCC48 |
| A3PN030-Z1QN68I | FPGA, 768 CLBS, 30000 GATES, QCC68 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A3PN030-VQG100 | 制造商:Microsemi Corporation 功能描述:FPGA PROASIC3 NANO 30K GATES 130NM 1.5V - Trays |
| A3PN030-Z1QNG48 | 功能描述:IC FPGA NANO 30K GATES 48-QFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| A3PN030-Z1QNG48I | 功能描述:IC FPGA NANO 30K GATES 48-QFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| A3PN030-Z1QNG68 | 功能描述:IC FPGA NANO 30K GATES 68-QFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| A3PN030-Z1QNG68I | 功能描述:IC FPGA NANO 30K GATES 68-QFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3 nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。