Revision 13 2-43 HSTL Class II High-Speed Transceiver Logic is a general-purpose high-speed 1.5 V bus standard" />
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    參數(shù)資料
    型號: A3PE600-FGG484I
    廠商: Microsemi SoC
    文件頁數(shù): 116/162頁
    文件大小: 0K
    描述: IC FPGA 600000 GATES 484-FBGA
    標準包裝: 40
    系列: ProASIC3E
    RAM 位總計: 110592
    輸入/輸出數(shù): 270
    門數(shù): 600000
    電源電壓: 1.425 V ~ 1.575 V
    安裝類型: 表面貼裝
    工作溫度: -40°C ~ 85°C
    封裝/外殼: 484-BGA
    供應(yīng)商設(shè)備封裝: 484-FPBGA(23x23)
    ProASIC3E Flash Family FPGAs
    Revision 13
    2-43
    HSTL Class II
    High-Speed Transceiver Logic is a general-purpose high-speed 1.5 V bus standard (EIA/JESD8-6).
    ProASIC3E devices support Class II. This provides a differential amplifier input buffer and a push-pull
    output buffer.
    Timing Characteristics
    Table 2-63 Minimum and Maximum DC Input and Output Levels
    HSTL Class II
    VIL
    VIH
    VOL
    VOH
    IOL IOH
    IOSL
    IOSH
    IIL IIH
    Drive
    Strength
    Min.
    V
    Max.
    V
    Min.
    V
    Max.
    V
    Max.,
    V
    Min.
    VmA mA
    Max.
    mA1
    Max.
    mA1
    A2 A2
    15 mA3
    –0.3
    VREF – 0.1 VREF + 0.1
    3.6
    0.4
    VCCI – 0.4 15 15
    55
    66
    10 10
    Notes:
    1. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
    2. Currents are measured at 85°C junction temperature.
    3. Output drive strength is below JEDEC specification.
    Figure 2-17 AC Loading
    Table 2-64 AC Waveforms, Measuring Points, and Capacitive Loads
    Input Low (V)
    Input High (V)
    Measuring
    Point* (V)
    VREF (typ.) (V)
    VTT (typ.) (V)
    CLOAD (pF)
    VREF – 0.1
    VREF + 0.1
    0.75
    20
    Note: *Measuring point = Vtrip. See Table 2-15 on page 2-18 for a complete table of trip points.
    Test Point
    20 pF
    25
    HSTL
    Class II
    VTT
    Table 2-65 HSTL Class II
    Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V,
    Worst-Case VCCI = 1.4 V, VREF = 0.75 V
    Speed
    Grade
    tDOUT
    tDP
    tDIN
    tPY
    tEOUT
    tZL
    tZH
    tLZ
    tHZ
    tZLS
    tZHS
    Units
    Std.
    0.66
    3.02
    0.04
    2.12
    0.43
    3.08
    2.71
    5.32
    4.95
    ns
    –1
    0.56
    2.57
    0.04
    1.81
    0.36
    2.62
    2.31
    4.52
    4.21
    ns
    –2
    0.49
    2.26
    0.03
    1.59
    0.32
    2.30
    2.03
    3.97
    3.70
    ns
    Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-5 for derating values.
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