2-82 Revision 13 Embedded FlashROM Characteristics Timing Characteristics JTAG 1532 Characterist" />
參數(shù)資料
型號: A3PE600-FGG256I
廠商: Microsemi SoC
文件頁數(shù): 159/162頁
文件大?。?/td> 0K
描述: IC FPGA 600000 GATES 256-FBGA
標(biāo)準(zhǔn)包裝: 90
系列: ProASIC3E
RAM 位總計: 110592
輸入/輸出數(shù): 165
門數(shù): 600000
電源電壓: 1.425 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 256-LBGA
供應(yīng)商設(shè)備封裝: 256-FPBGA(17x17)
ProASIC3E DC and Switching Characteristics
2-82
Revision 13
Embedded FlashROM Characteristics
Timing Characteristics
JTAG 1532 Characteristics
JTAG timing delays do not include JTAG I/Os. To obtain complete JTAG timing, add I/O buffer delays to
the corresponding standard selected; refer to the I/O timing characteristics in the "User I/O
Timing Characteristics
Figure 2-54 Timing Diagram
A0
A1
tSU
tHOLD
tSU
tHOLD
tSU
tHOLD
tCKQ2
CLK
Address
Data
D0
D1
Table 2-102 Embedded FlashROM Access Time
Parameter
Description
–2
–1
Std.
Units
tSU
Address Setup Time
0.53
0.61
0.71
ns
tHOLD
Address Hold Time
0.00
ns
tCK2Q
Clock to Out
16.23
18.48
21.73
ns
FMAX
Maximum Clock Frequency
15
MHz
Table 2-103 JTAG 1532
Commercial-Case Conditions: TJ = 70°C, VCC = 1.425 V
Parameter
Description
–2
–1
Std.
Units
tDISU
Test Data Input Setup Time
0.50
0.57
0.67
ns
tDIHD
Test Data Input Hold Time
1.00
1.13
1.33
ns
tTMSSU
Test Mode Select Setup Time
0.50
0.57
0.67
ns
tTMDHD
Test Mode Select Hold Time
1.00
1.13
1.33
ns
tTCK2Q
Clock to Q (data out)
6.00
6.80
8.00
ns
tRSTB2Q
Reset to Q (data out)
20.00 22.67
26.67
ns
FTCKMAX
TCK Maximum Frequency
25.00 22.00
19.00
MHz
tTRSTREM
ResetB Removal Time
0.00
ns
tTRSTREC
ResetB Recovery Time
0.20
0.23
0.27
ns
tTRSTMPW
ResetB Minimum Pulse
TBD
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-5 for derating values.
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