2-68 Revision 13 Timing Characteristics Table 2-95 A3PE600 Global Resource
  • 參數(shù)資料
    型號: A3PE600-2FGG256I
    廠商: Microsemi SoC
    文件頁數(shù): 144/162頁
    文件大?。?/td> 0K
    描述: IC FPGA 600000 GATES 256-FBGA
    標準包裝: 90
    系列: ProASIC3E
    RAM 位總計: 110592
    輸入/輸出數(shù): 165
    門數(shù): 600000
    電源電壓: 1.425 V ~ 1.575 V
    安裝類型: 表面貼裝
    工作溫度: -40°C ~ 85°C
    封裝/外殼: 256-LBGA
    供應商設備封裝: 256-FPBGA(17x17)
    ProASIC3E DC and Switching Characteristics
    2-68
    Revision 13
    Timing Characteristics
    Table 2-95 A3PE600 Global Resource
    Commercial-Case Conditions: TJ = 70°C, VCC = 1.425 V
    Parameter
    Description
    –2
    –1
    Std.
    Units
    Min.1 Max.2 Min.1 Max.2 Min.1 Max.2
    tRCKL
    Input Low Delay for Global Clock
    0.83
    1.04
    0.94
    1.18
    1.11
    1.39
    ns
    tRCKH
    Input High Delay for Global Clock
    0.81
    1.06
    0.93
    1.21
    1.09
    1.42
    ns
    tRCKMPWH Minimum Pulse Width High for Global Clock
    0.75
    0.85
    1.00
    ns
    tRCKMPWL
    Minimum Pulse Width Low for Global Clock
    0.85
    0.96
    1.13
    ns
    tRCKSW
    Maximum Skew for Global Clock
    0.25
    0.28
    0.33
    ns
    Notes:
    1. Value reflects minimum load. The delay is measured from the CCC output to the clock pin of a sequential element,
    located in a lightly loaded row (single element is connected to the global net).
    2. Value reflects maximum load. The delay is measured on the clock pin of the farthest sequential element, located in a fully
    loaded row (all available flip-flops are connected to the global net in the row).
    3. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-5 for derating values.
    Table 2-96 A3PE1500 Global Resource
    Commercial-Case Conditions: TJ = 70°C, VCC = 1.425 V
    Parameter
    Description
    –2
    –1
    Std.
    Units
    Min.1 Max.2 Min.1 Max.2 Min.1 Max.2
    tRCKL
    Input Low Delay for Global Clock
    1.071.291.221.471.431.72
    ns
    tRCKH
    Input High Delay for Global Clock
    1.061.321.211.501.421.76
    ns
    tRCKMPWH Minimum Pulse Width High for Global Clock
    0.75
    0.85
    1.00
    ns
    tRCKMPWL
    Minimum Pulse Width Low for Global Clock
    0.85
    0.96
    1.13
    ns
    tRCKSW
    Maximum Skew for Global Clock
    0.26
    0.29
    0.34
    ns
    Notes:
    1. Value reflects minimum load. The delay is measured from the CCC output to the clock pin of a sequential element,
    located in a lightly loaded row (single element is connected to the global net).
    2. Value reflects maximum load. The delay is measured on the clock pin of the farthest sequential element, located in a fully
    loaded row (all available flip-flops are connected to the global net in the row).
    3. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-5 for derating values.
    Table 2-97 A3PE3000 Global Resource
    Commercial-Case Conditions: TJ = 70°C, VCC = 1.425 V
    Parameter
    Description
    –2
    –1
    Std.
    Units
    Min.1 Max.2 Min.1 Max.2 Min.1 Max.2
    tRCKL
    Input Low Delay for Global Clock
    1.411.621.601.851.882.17
    ns
    tRCKH
    Input High Delay for Global Clock
    1.401.661.591.891.872.22
    ns
    tRCKMPWH Minimum Pulse Width High for Global Clock
    0.75
    0.85
    1.00
    ns
    tRCKMPWL
    Minimum Pulse Width Low for Global Clock
    0.85
    0.96
    1.13
    ns
    tRCKSW
    Maximum Skew for Global Clock
    0.26
    0.29
    0.35
    ns
    Notes:
    1. Value reflects minimum load. The delay is measured from the CCC output to the clock pin of a sequential element,
    located in a lightly loaded row (single element is connected to the global net).
    2. Value reflects maximum load. The delay is measured on the clock pin of the farthest sequential element, located in a fully
    loaded row (all available flip-flops are connected to the global net in the row).
    3. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-5 for derating values.
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