ProASIC3L Low Power Flash FPGAs
Revision 13
2-95
Timing Characteristics
Table 2-160 SSTL2 Class I – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCI = 2.3 V VREF = 1.25 V
Applicable to Pro I/Os
Speed
Grade
tDOUT
tDP
tDIN
tPY
tEOUT
tZL
tZH
tLZ
tHZ
tZLS
tZHS
Units
Std.
0.59
1.91
0.04
1.89
0.38
1.95
1.66
1.95
1.66
ns
–1
0.50
1.63
0.03
1.61
0.33
1.66
1.41
1.66
1.41
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values. Table 2-161 SSTL2 Class I – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V,
Worst-Case VCCI = 2.3 V VREF = 1.25 V
Applicable to Pro I/O Banks
Speed
Grade
tDOUT
tDP
tDIN
tPY
tEOUT
tZL
tZH
tLZ
tHZ
tZLS
tZHS
Units
Std.
0.77
1.91
0.05
1.89
0.50
1.95
1.66
1.95
1.66
ns
–1
0.66
1.63
0.04
1.61
0.43
1.66
1.41
1.66
1.41
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values.