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ProASIC3E DC and Switching Characteristics
2-32
Revision 13
1.8 V LVCMOS
Low-Voltage CMOS for 1.8 V is an extension of the LVCMOS standard (JESD8-5) used for general-
purpose 1.8 V applications. It uses a 1.8 V input buffer and a push-pull output buffer.
Table 2-37 Minimum and Maximum DC Input and Output Levels
1.8 V
LVCMOS
VIL
VIH
VOL
VOH
IOL IOH
IOSL
IOSH
IIL1 IIH2
Drive
Strength
Min.
V
Max.
V
Min.
V
Max.
V
Max.
V
Min.
VmA mA
Max.
mA3
Max.
mA3
A4 A4
2 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
3.6
0.45 VCCI 鈥� 0.45 2
2
11
9
10 10
4 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
3.6
0.45 VCCI 鈥� 0.45 4
4
22
17
10 10
6 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
3.6
0.45 VCCI 鈥� 0.45 6
6
44
35
10 10
8 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
3.6
0.45 VCCI 鈥� 0.45 8
8
51
45
10 10
12 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
3.6
0.45 VCCI 鈥� 0.45 12 12
74
91
10 10
16 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
3.6
0.45 VCCI 鈥� 0.45 16 16
74
91
10 10
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where 鈥�0.3 V < VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
larger when operating outside recommended ranges.
3. Currents are measured at high temperature (100掳C junction temperature) and maximum voltage.
4. Currents are measured at 85掳C junction temperature.
5. Software default selection highlighted in gray.
Figure 2-9 AC Loading
Table 2-38 AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V)
Measuring Point* (V)
VREF (typ.) (V)
CLOAD (pF)
0
1.8
0.9
鈥�
35
Note: *Measuring point = Vtrip. See Table 2-15 on page 2-18 for a complete table of trip points.
Test Point
Enable Path
Datapath
35 pF
R = 1 k
R to VCCI for tLZ / tZL / tZLS
R to GND for tHZ / tZH / tZHS
35 pF for tZH / tZHS / tZL / tZLS
35 pF for tHZ / tLZ
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