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FlashROM in Actel’s Low-Power Flash Devices
v1.1
5 - 7
Figure 5-7 Accessing FlashROM Using FPGA Core
Figure 5-8 Accessing FlashROM Using JTAG Port
0
1
2
3
4
5
6
7
6
5
4
3
2
1
0
8
9
10
11
12
13
14
15
Word Number in Page
4 LSB of ADDR (READ)
Page
Number
3
MSB
of
ADDR
(READ)
3-Bit Page Address
111
1110000
7-Bit Address from Core
0000
4-Bit
W
ord
Address
8-Bit Data
to FPGA Core
8-Bit Data from Page 7 Word 0
0
1
2
3
4
5
6
7
6
5
4
3
2
1
0
8
9
10
11
12
13
14
15
Word Number in Page
4 LSB of ADDR (READ)
Page
Number
3
MSB
of
ADDR
(READ)
4-Bit Page Address
from JTAG Interface
To/From JTAG Interface
...........................00001:128 Bit Data