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| 型號： | A176B |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | DIFFERENTIAL BUS TRANSCEIVERS |
| 中文描述： | 差分總線收發(fā)器 |
| 文件頁數(shù)： | 7/21頁 |
| 文件大?。?/td> | 402K |
| 代理商： | A176B |
SN65176B, SN75176B
DIFFERENTIAL BUS TRANSCEIVERS
SLLS101D
–
JULY 1985
–
REVISED APRIL 2003
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics, V
CC
= 5 V, C
L
= 15 pF, T
A
= 25
°
C
PARAMETER
TEST CONDITIONS
MIN
TYP
21
MAX
UNIT
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Propagation delay time, low- to high-level output
VID= 0 to 3 V
VID = 0 to 3 V, See Figure 6
35
ns
Propagation delay time, high- to low-level output
23
35
Output enable time to high level
See Figure 7
10
20
ns
Output enable time to low level
12
20
Output disable time from high level
Output disable time from low level
See Figure 7
20
17
35
25
ns
PARAMETER MEASUREMENT INFORMATION
Figure 1. Driver V
OD
and V
OC
2
RL
VOD2
VOC
2
RL
Figure 2. Receiver V
OH
and V
OL
VID
VOL
VOH
–
IOH
+IOL
3 V
VOLTAGE WAVEFORMS
tt(OD)
td(OD)
1.5 V
10%
tt(OD)
≈
2.5 V
≈
–
2.5 V
90%
50%
Output
td(OD)
0 V
3 V
1.5 V
Input
TEST CIRCUIT
Output
CL = 50 pF
(see Note A)
50
RL = 54
Generator
(see Note B)
50%
10%
NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR
≤
1 MHz, 50% duty cycle, tr
≤
6 ns, tf
≤
6 ns,
ZO = 50
.
Figure 3. Driver Test Circuit and Voltage Waveforms
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