參數(shù)資料
型號(hào): A1645LK-I2
廠商: Allegro Microsystems Inc
文件頁數(shù): 11/14頁
文件大小: 356K
描述: IC SENSOR HALL EFFECT AC 4-SIP
產(chǎn)品培訓(xùn)模塊: Current Sensor
標(biāo)準(zhǔn)包裝: 500
傳感范圍: 120mV 跳閘,120mV 釋放
類型: 專用型
電源電壓: 4 V ~ 24 V
電流 - 電源: 8.4mA
輸出類型: 數(shù)字,開路集電極
工作溫度: -40°C ~ 150°C
封裝/外殼: 4-SIP
供應(yīng)商設(shè)備封裝: 4-SIP
包裝: 散裝
Two-Wire True Zero-Speed Miniature Differential
Peak-Detecting Sensor IC with Continuous Calibration
A1642
11
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
DEVICE OPERATION
Each operating mode is described in detail below.
Power-On
When power (V
CC
 > V
CC(Min)
) is applied to the device, a short
period of time is required to power the various portions of the
IC. During this period, the A1642 powers-on in the high current
state, I
CC(High)
. After power-on, there are conditions that could
induce a change in the output state. Such an event could be
caused by thermal transients, but would require a static applied
magnetic  eld, proper signal polarity, and particular direction
and magnitude of internal signal drift.
Initial Offset Adjust
The device initially cancels the effects of chip, magnet, and
installation offsets. Once offsets have been cancelled, the digital
tracking DAC is ready to track the signal and provide output
switching. The period of time required for both Power-On and
Initial Offset Adjust is de ned as the Power-On Time.
Calibration Mode
The calibration mode allows the device to automatically select
the proper signal gain and continue to adjust for offsets. The
AGC is active, and selects the optimal signal gain based on the
amplitude of the V
PROC
 signal. Following each adjustment to
the AGC DAC, the Offset DAC is also adjusted to ensure the
internal analog signal is properly centered.
During this mode, the tracking DAC is active and output switch-
ing occurs, but the duty cycle is not guaranteed to be within
speci cation.
Running Mode
After the Initial Calibration period, C
I
, establishes a signal gain,
the device moves to Running mode. During Running mode, the
device tracks the input signal and gives an output edge for every
peak of the signal. AOA remains active to compensate for any
offset drift over time.
The A1642 incorporates a novel algorithm for adjusting the
signal gain during Running mode. This algorithm is designed
to optimize the V
PROC
 signal amplitude in instances where the
magnetic signal seen during the calibration period is not repre-
sentative of the amplitude of the magnetic signal for the installed
device air gap (see  gure 9).
Device Electrical
Output, I
OUT
Internal Differential
Signal, V
PROC
B
RP
 
B
OP
 
B
OP
 
BRP
1
2
3
4
5
Figure 9: Operation of Running Mode Gain Adjust.
Position 1. The device is initially powered-on. Self-calibration occurs.
Position 2. Small amplitude oscillation of the target sends an erroneously small differential signal to the device. The ampli-
tude of V
PROC
 is greater than the switching hysteresis (B
OP
 and B
RP
), and the device output switches.
Position 3. The calibration period completes on the third rising output edge, and the device enters Running mode.
Position 4. True target rotation occurs and the correct magnetic signal is generated for the installation air gap. The estab-
lished signal gain is too large for the targets rotational magnetic signal at the given air gap.
Position 5. Running Mode Calibration corrects the signal gain to an optimal level for the installation air gap.
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