參數(shù)資料
型號: A14V60A-PQG208C
廠商: Microsemi SoC
文件頁數(shù): 16/90頁
文件大?。?/td> 0K
描述: IC FPGA 6K GATES 3.3V 208-PQFP
標(biāo)準(zhǔn)包裝: 24
系列: ACT™ 3
LAB/CLB數(shù): 848
輸入/輸出數(shù): 167
門數(shù): 6000
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 70°C
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
Accelerator Series FPGAs – ACT 3 Family
R e visio n 3
2 - 15
Determining Average Switching Frequency
To determine the switching frequency for a design, you must have a detailed understanding of the data
input values to the circuit. The following guidelines are meant to represent worst-case scenarios so that
they can be generally used to predict the upper limits of power dissipation. These guidelines are as
follows:
Table 2-13 Guidelines for Predicting Power Dissipation
Data
Value
Logic Modules (m)
80% of modules
Inputs switching (n)
# inputs/4
Outputs switching (p)
# output/4
First routed array clock loads (q1)
40% of sequential modules
Second routed array clock loads (q2)
40% of sequential modules
Load capacitance (CL)
35 pF
Average logic module switching rate (fm)
F/10
Average input switching rate (fn)
F/5
Average output switching rate (fp)
F/10
Average first routed array clock rate (fq1)
F/2
Average second routed array clock rate (fq2)
F/2
Average dedicated array clock rate (fs1)
F
Average dedicated I/O
clock rate (fs2)
F
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