參數(shù)資料
型號： A14V25A-VQ100C
廠商： Microsemi SoC
文件頁數(shù)： 7/90頁
文件大小： 0K
描述： IC FPGA 2500 GATES 3.3V 100-VQFP
產(chǎn)品變化通告： A1425A Family Discontinuation 23/Jan/2012
標(biāo)準(zhǔn)包裝： 90
系列： ACT™ 3
LAB/CLB數(shù)： 310
輸入/輸出數(shù)： 83
門數(shù)： 2500
電源電壓： 3 V ~ 3.6 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 70°C
封裝/外殼： 100-TQFP
供應(yīng)商設(shè)備封裝： 100-VQFP（14x14）
Accelerator Series FPGAs – ACT 3 Family
R e visio n 3
2 -7
Antifuse Connections
An antifuse is a “normally open” structure as opposed to the normally closed fuse structure used in
PROMs or PALs. The use of antifuses to implement a programmable logic device results in highly
testable structures as well as an efficient programming architecture. The structure is highly testable
because there are no preexisting connections; temporary connections can be made using pass
transistors. These temporary connections can isolate individual antifuses to be programmed as well as
isolate individual circuit structures to be tested. This can be done both before and after programming. For
example, all metal tracks can be tested for continuity and shorts between adjacent tracks, and the
functionality of all logic modules can be verified.
Four types of antifuse connections are used in the routing structure of the ACT 3 array. (The physical
structure of the antifuse is identical in each case; only the usage differs.)
Table 2-1 shows four types of antifuses.
Examples of all four types of connections are shown in Figure 2-7 on page 2-6 and Figure 2-8 on
Module Interface
Connections to Logic and I/O modules are made through vertical segments that connect to the module
inputs and outputs. These vertical segments lie on vertical tracks that span the entire height of the array.
Module Input Connections
The tracks dedicated to module inputs are segmented by pass transistors in each module row. During
normal user operation, the pass transistors are inactive, which isolates the inputs of a module from the
inputs of the module directly above or below it. During certain test modes, the pass transistors are active
to verify the continuity of the metal tracks. Vertical input segments span only the channel above or the
channel below. The logic modules are arranged such that half of the inputs are connected to the channel
above and half of the inputs to segments in the channel below, as shown in Figure 2-9.
Table 2-1 Antifuse Types
Type
Description
XF
Horizontal-to-vertical connection
HF
Horizontal-to-horizontal connection
VF
Vertical-to-vertical connection
FF
"Fast" vertical connection
Figure 2-9
Logic Module Routing Interface
Y+2
Y+1
A1 D10 D11
B1 B0
D01 D00
Y-1
Y-2
LVTs
Y+2
Y+1
Y
Y-1
Y-2
C-Modules
S-Modules
D10
B0
A0 D11 A1
B1 D01
A0
Y
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參數(shù)描述
A14V25A-VQG100C 功能描述:IC FPGA 2500 GATES 3.3V 100-VQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ACT™ 3 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55）
A14V40AA-1BG208B 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:Accelerator Series FPGAs - ACT 3Family
A14V40AA-1BG208C 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:Accelerator Series FPGAs - ACT 3Family
A14V40AA-1BG208I 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:Accelerator Series FPGAs - ACT 3Family
A14V40AA-1BG208M 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:Accelerator Series FPGAs - ACT 3Family
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