參數(shù)資料
型號(hào)： A1440A-PL84C
廠商： Microsemi SoC
文件頁(yè)數(shù)： 46/90頁(yè)
文件大?。?/td> 0K
描述： IC FPGA 4K GATES 84-PLCC
產(chǎn)品變化通告： A1440A Family Discontinuation 24/Jan/2012
標(biāo)準(zhǔn)包裝： 16
系列： ACT™ 3
LAB/CLB數(shù)： 564
輸入/輸出數(shù)： 70
門(mén)數(shù)： 4000
電源電壓： 4.5 V ~ 5.5 V
安裝類(lèi)型： 表面貼裝
工作溫度： 0°C ~ 70°C
封裝/外殼： 84-LCC（J 形引線(xiàn)）
供應(yīng)商設(shè)備封裝： 84-PLCC（29.31x29.31）
Detailed Specifications
2- 42
R e visio n 3
Pin Descriptions
CLKA
Clock A (Input)
Clock input for clock distribution networks. The Clock input is buffered prior to clocking the logic modules.
This pin can also be used as an I/O.
CLKB
Clock B (Input)
Clock input for clock distribution networks. The Clock input is buffered prior to clocking the logic modules.
This pin can also be used as an I/O.
GND
Ground
LOW supply voltage.
HCLK
Dedicated (Hard-wired)
Array Clock (Input)
Clock input for sequential modules. This input is directly wired to each S-Module and offers clock speeds
independent of the number of S-Modules being driven. This pin can also be used as an I/O.
I/O
Input/Output (Input, Output)
The I/O pin functions as an input, output, three-state, or bidirectional buffer. Input and output levels are
compatible with standard TTL and CMOS specifications. Unused I/O pins are tristated by the Designer
Series software.
IOCLK
Dedicated (Hard-wired)
I/O Clock (Input)
Clock input for I/O modules. This input is directly wired to each I/O module and offers clock speeds
independent of the number of I/O modules being driven. This pin can also be used as an I/O.
IOPCL
Dedicated (Hard-wired)
I/O Preset/Clear (Input)
Input for I/O preset or clear. This global input is directly wired to the preset and clear inputs of all I/O
registers. This pin functions as an I/O when no I/O preset or clear macros are used.
MODE
Mode (Input)
The MODE pin controls the use of diagnostic pins (DCLK, PRA, PRB, SDI). When the MODE pin is
HIGH, the special functions are active. When the MODE pin is LOW, the pins function as I/Os. To provide
Actionprobe capability, the MODE pin should be terminated to GND through a 10K resistor so that the
MODE pin can be pulled high when required.
NC
No Connection
This pin is not connected to circuitry within the device.
PRA
Probe A (Output)
The Probe A pin is used to output data from any user-defined design node within the device. This
independent diagnostic pin can be used in conjunction with the Probe B pin to allow real-time diagnostic
output of any signal path within the device. The Probe A pin can be used as a user-defined I/O when
debugging has been completed. The pin’s probe capabilities can be permanently disabled to protect
programmed design confidentiality. PRA is accessible when the MODE pin is HIGH. This pin functions as
an I/O when the MODE pin is LOW.
PRB
Probe B (Output)
The Probe B pin is used to output data from any user-defined design node within the device. This
independent diagnostic pin can be used in conjunction with the Probe A pin to allow real-time diagnostic
output of any signal path within the device. The Probe B pin can be used as a user-defined I/O when
debugging has been completed. The pin’s probe capabilities can be permanently disabled to protect
programmed design confidentiality. PRB is accessible when the MODE pin is HIGH. This pin functions as
an I/O when the MODE pin is LOW.
SDI
Serial Data Input (Input)
Serial data input for diagnostic probe and device programming. SDI is active when the MODE pin is
HIGH. This pin functions as an I/O when the MODE pin is LOW.
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參數(shù)描述
A1440A-PL84I 功能描述:IC FPGA 4K GATES 84-PLCC RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:ACT™ 3 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門(mén)數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類(lèi)型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55）
A1440A-PLG84C 功能描述:IC FPGA 4K GATES 84-PLCC RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:ACT™ 3 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門(mén)數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類(lèi)型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55）
A1440A-PLG84I 功能描述:IC FPGA 4K GATES 84-PLCC RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:ACT™ 3 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門(mén)數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類(lèi)型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55）
A1440APQ160C 制造商:Microsemi SOC Products Group 功能描述:Field-Programmable Gate Array, 564 Cell, 160 Pin, Plastic, QFP
A1440A-PQ160C 功能描述:IC FPGA 4K GATES 160-PQFP RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:ACT™ 3 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門(mén)數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類(lèi)型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55）
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