參數(shù)資料
型號: A1425LK
廠商: Allegro MicroSystems, Inc.
元件分類: 速度傳感器和接近開關(guān)
英文描述: High Accuracy Analog Speed Sensor with Integrated Filter Capacitor and Dual Zero-Crossing Output Signal
中文描述: 高精度模擬集成濾波電容器和雙零速傳感器輸出信號通道
文件頁數(shù): 11/12頁
文件大?。?/td> 502K
代理商: A1425LK
11
A1425-DS Rev. 0b
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
115 Northeast Cutoff, Box 15036
Allegro MicroSystems, Inc.
High Accuracy Analog Speed Sensor with Integrated Filter Capacitor and Dual Zero-Crossing Output Signal
A1425
2
A1425
1
3
4
VOUT
0.1 uF
R
PU
VCC
AC-Coupled Operation
Steady-state magnet and system offsets are eliminated using an
on-chip differential band-pass
fi
lter. The low and high frequency
poles of this band-pass
fi
lter are set using internal integrated
capacitors and resistors. The differential structure of this
fi
lter
improves the ability of the IC to reject single-ended noise on
the ground (GND pin) or supply line (VCC pin) and, as a result,
makes it more resistant to electromagnetic interference typically
seen in hostile remote-sensing environments.
Power Supply Protection
The A1425 contains an on-chip voltage regulator and can oper-
ate over a wide supply voltage range. In applications that operate
the device from an unregulated power supply, transient protec-
tion must be added externally. For applications using a regulated
line, EMI/RFI protection may still be required. The circuit
shown in
fi
gure 2 is the most basic con
fi
guration required for
proper device operation.
Figure 2. Basic application circuit
. A pull-up resistor is required with
the output driver.
Power Derating
The device must be operated below the maximum junction
temperature of the device, T
J(max)
. Under certain combinations of
peak conditions, reliable operation may require derating sup-
plied power or improving the heat dissipation properties of the
application. This section presents a procedure for correlating
factors affecting operating T
J
. (Thermal data is also available on
the Allegro MicroSystems Web site.)
The Package Thermal Resistance, R
θ
JA
, is a
fi
gure of merit sum-
marizing the ability of the application and the device to dissipate
heat from the junction (die), through all paths to the ambient air.
Its primary component is the Effective Thermal Conductivity,
K, of the printed circuit board, including adjacent devices and
traces. Radiation from the die through the device case, R
θ
JC
, is
relatively small component of R
θ
JA
. Ambient air temperature,
T
A
, and air motion are signi
fi
cant external factors, damped by
overmolding.
The effect of varying power levels (Power Dissipation, P
D
), can
be estimated. The following formulas represent the fundamental
relationships used to estimate T
J
, at P
D
.
P
D
= V
IN
×
I
IN
T = P
D
×
R
θ
JA
T
J
= T
A
+
T
(1)
(2)
(3)
For example, given common conditions such as: T
A
= 25°C,
V
CC
= 12 V, I
CC
= 4.2 mA, and R
θ
JA
= 177 °C/W, then:
A worst-case estimate, P
D(max)
, represents the maximum allow-
able power level (V
CC(max)
, I
CC(max)
), without exceeding T
J(max)
,
at a selected R
θ
JA
and T
A
.
Example
P
D
= V
CC
×
I
CC
= 12 V
×
4.2 mA = 50 mW
T = P
D
×
R
θ
JA
= 50 mW
×
177 °C/W = 9°C
T
J
= T
A
+
T = 25°C + 9°C = 34°C
Reliability for V
CC
at T
A
=
150°C, package L-I1, using minimum-
K PCB
Observe the worst-case ratings for the device, speci
fi
cally:
R
θ
JA
=
177°C/W, T
J(max)
=
165°C, V
CC(max)
=
26.5
V, and
I
CC(max)
=
7.0
mA.
Calculate the maximum allowable power level, P
D(max)
. First,
invert equation 3:
T
max
= T
J(max)
– T
A
= 165
°C
150
°C = 15
°C
This provides the allowable increase to T
J
resulting from internal
power dissipation. Then, invert equation 2:
P
D(max)
=
T
max
÷ R
θ
JA
= 15°C ÷ 177 °C/W = 91 mW
Finally, invert equation 1 with respect to voltage:
V
CC(est)
= P
D(max)
÷ I
CC(max)
= 91 mW ÷ 7.0 mA = 13 V
The result indicates that, at T
A
, the application and device can
dissipate adequate amounts of heat at voltages
V
CC(est)
.
Compare V
CC(est)
to V
CC(max)
. If V
CC(est)
V
CC(max)
, then reli-
able operation between V
CC(est)
and V
CC(max)
requires enhanced
R
θ
JA
. If V
CC(est)
V
CC(max)
, then operation between V
CC(est)
and
V
CC(max)
is reliable under these conditions.
Preliminary - Subject to Change
Without Notice November 10, 2004
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