參數(shù)資料
型號(hào)： A1415A-1PQG100C
廠商： Microsemi SoC
文件頁數(shù)： 46/90頁
文件大小： 0K
描述： IC FPGA 1500 GATES 100-PQFP
標(biāo)準(zhǔn)包裝： 66
系列： ACT™ 3
LAB/CLB數(shù)： 200
輸入/輸出數(shù)： 80
門數(shù)： 1500
電源電壓： 4.5 V ~ 5.5 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 70°C
封裝/外殼： 100-BQFP
供應(yīng)商設(shè)備封裝： 100-PQFP（14x20）
Detailed Specifications
2- 42
R e visio n 3
Pin Descriptions
CLKA
Clock A (Input)
Clock input for clock distribution networks. The Clock input is buffered prior to clocking the logic modules.
This pin can also be used as an I/O.
CLKB
Clock B (Input)
Clock input for clock distribution networks. The Clock input is buffered prior to clocking the logic modules.
This pin can also be used as an I/O.
GND
Ground
LOW supply voltage.
HCLK
Dedicated (Hard-wired)
Array Clock (Input)
Clock input for sequential modules. This input is directly wired to each S-Module and offers clock speeds
independent of the number of S-Modules being driven. This pin can also be used as an I/O.
I/O
Input/Output (Input, Output)
The I/O pin functions as an input, output, three-state, or bidirectional buffer. Input and output levels are
compatible with standard TTL and CMOS specifications. Unused I/O pins are tristated by the Designer
Series software.
IOCLK
Dedicated (Hard-wired)
I/O Clock (Input)
Clock input for I/O modules. This input is directly wired to each I/O module and offers clock speeds
independent of the number of I/O modules being driven. This pin can also be used as an I/O.
IOPCL
Dedicated (Hard-wired)
I/O Preset/Clear (Input)
Input for I/O preset or clear. This global input is directly wired to the preset and clear inputs of all I/O
registers. This pin functions as an I/O when no I/O preset or clear macros are used.
MODE
Mode (Input)
The MODE pin controls the use of diagnostic pins (DCLK, PRA, PRB, SDI). When the MODE pin is
HIGH, the special functions are active. When the MODE pin is LOW, the pins function as I/Os. To provide
Actionprobe capability, the MODE pin should be terminated to GND through a 10K resistor so that the
MODE pin can be pulled high when required.
NC
No Connection
This pin is not connected to circuitry within the device.
PRA
Probe A (Output)
The Probe A pin is used to output data from any user-defined design node within the device. This
independent diagnostic pin can be used in conjunction with the Probe B pin to allow real-time diagnostic
output of any signal path within the device. The Probe A pin can be used as a user-defined I/O when
debugging has been completed. The pin’s probe capabilities can be permanently disabled to protect
programmed design confidentiality. PRA is accessible when the MODE pin is HIGH. This pin functions as
an I/O when the MODE pin is LOW.
PRB
Probe B (Output)
The Probe B pin is used to output data from any user-defined design node within the device. This
independent diagnostic pin can be used in conjunction with the Probe A pin to allow real-time diagnostic
output of any signal path within the device. The Probe B pin can be used as a user-defined I/O when
debugging has been completed. The pin’s probe capabilities can be permanently disabled to protect
programmed design confidentiality. PRB is accessible when the MODE pin is HIGH. This pin functions as
an I/O when the MODE pin is LOW.
SDI
Serial Data Input (Input)
Serial data input for diagnostic probe and device programming. SDI is active when the MODE pin is
HIGH. This pin functions as an I/O when the MODE pin is LOW.
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參數(shù)描述
A1415A-1PQG100I 功能描述:IC FPGA 1500 GATES 100-PQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:ACT™ 3 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計(jì):6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23）
A1415A-1PQG100M 制造商:Microsemi Corporation 功能描述:FPGA ACT 3 Family 1.5K Gates 200 Cells 150MHz 0.8um Technology 5V 100-Pin PQFP 制造商:Microsemi Corporation 功能描述:FPGA ACT 3 1.5K GATES 200 CELLS 150MHZ 0.8UM 5V 100PQFP - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 1500 GATES 100-PQFP MIL
A1415A-1VQ100C 功能描述:IC FPGA 1500 GATES 100-VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:ACT™ 3 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計(jì):6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23）
A1415A-1VQ100I 功能描述:IC FPGA 1500 GATES 100-VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:ACT™ 3 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計(jì):6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23）
A1415A-1VQ100M 制造商:Microsemi Corporation 功能描述:FPGA ACT 3 Family 1.5K Gates 200 Cells 150MHz 0.8um Technology 5V 100-Pin VQFP 制造商:Microsemi Corporation 功能描述:FPGA ACT 3 1.5K GATES 200 CELLS 150MHZ 0.8UM 5V 100VQFP - Trays 制造商:Microsemi SOC Products Group 功能描述:FPGA ACT 3 1.5K GATES 200 CELLS 150MHZ 0.8UM 5V 100VQFP - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 1500 GATES 100-VQFP MIL
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