參數(shù)資料
型號: 9EPRS475CGLFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘產(chǎn)生/分配
英文描述: PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝: 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-56
文件頁數(shù): 14/20頁
文件大?。?/td> 177K
代理商: 9EPRS475CGLFT
IDT
System Clock for Embedded AMDTM based Systems
1615B—04/26/10
9EPRS475
System Clock for Embedded AMDTM based Systems
3
Pin Description (Continued)
PIN #
PIN NAME
TYPE
DESCRIPTION
31
ATIG0C_LPRS
OUT
Complementary clock of low-power differential push-pull ATIG pair with integrated series resistor. (no
50ohm shunt resistor to GND and no 33 ohm series resistor needed)
32
ATIG0T_LPRS
OUT
True clock of low-power differential push-pull ATIG pair with integrated series resistor. (no 50ohm
shunt resistor to GND and no 33 ohm series resistor needed)
33
VDD
PWR
Power supply, nominal 3.3V
34
GND
Ground pin
35
GNDA
GND
Ground for the Analog Core
36
VDDA
PWR
3.3V Power for the Analog Core
37
CPUKG1C_LPRS
OUT
Complementary signal of low-power differential push-pull AMD K8 "Greyhound" clock with integrated
series resistor.(no 33 ohm series resistor needed)
38
CPUKG1T_LPRS
OUT
True signal of low-power differential push-pull AMD K8 "Greyhound" clock with integrated series
resistor. (no 33 ohm series resistor needed)
39
GNDCPU
GND
Ground pin for the CPU outputs
40
VDDCPU
PWR
Supply for CPU core, 3.3V nominal
41
CPUKG0C_LPRS
OUT
Complementary signal of low-power differential push-pull AMD K8 "Greyhound" clock with integrated
series resistor. (no 33 ohm series resistor needed)
42
CPUKG0T_LPRS
OUT
True signal of low-power differential push-pull AMD K8 "Greyhound" clock with integrated series
resistor.(no 33 ohm series resistor needed)
43
PD#
IN
Enter /Exit Power Down.
0 = Power Down, 1 = normal operation.
44
RESTORE#
I/O
Open Drain I/O. As an input it restores the PLL's to power up default state. As an output, this signal
is driven low when the internal watchdog hardware timer expires. It is cleared when the internal
watchdog hardware timer is reset or disabled. The input is falling edge triggered.
0 = Restore Settings, 1 = normal operation.
45
GNDHTT
PWR
Ground pin for the HTT outputs
46
HTT0C_LPRS/66M
OUT
Complementary signal of low-power differential push-pull hypertransport clock with integrated series
resistor. (no 50ohm shunt resistor to GND and no 33 ohm series resistor needed) / 3.3V single ended
66MHz hyper transport clock
47
HTT0T_LPRS/66M
OUT
True signal of low-power differential push-pull hypertransport clock with integrated series resistor. (no
50ohm shunt resistor to GND and no 33 ohm series resistor needed) / 3.3V single ended 66MHz
hyper transport clock
48
VDDHTT
PWR
Supply for HTT clocks, nominal 3.3V.
49
REF2
OUT
14.318 MHz reference clock, 3.3V
50
REF1
OUT
14.318 MHz 3.3V reference clock
51
REF0/SEL_HTT66
I/O
14.318 MHz 3.3V reference clock./ 3.3V tolerant latched input to select Hyper Transport Clock
Frequency.
0 = 100MHz differential HTT clock, 1 = 66MHz 3.3V single ended HTT clock
52
VDDREF
PWR
Ref, XTAL power supply, nominal 3.3V
53
GNDREF
GND
Ground pin for the REF outputs.
54
X1
IN
Crystal input, nominally 14.318MHz
55
X2
OUT
Crystal output, nominally 14.318MHz
56
VDD48
PWR
Power pin for the 48MHz outputs and core. 3.3V
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