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參數(shù)資料
| 型號(hào)： | 9DB633AFLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 9DB SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 0.209 INCH, ROHS COMPLIANT, MO-150, SSOP-28 |
| 文件頁數(shù)： | 2/14頁 |
| 文件大?。?/td> | 182K |
| 代理商： | 9DB633AFLFT |
IDT
Six Output Differential Buffer for PCIe Gen3
1668C—04/20/11
9DB633
Six Output Differential Buffer for PCIe Gen3
10
Datasheet
SMB usTable: Device Control Register, READ /WRITE ADDRESS (D4/D5)
Pin #
Name
Control Function Type
0
1
Default
Bit 7
SW_EN
Enables SMBus
Control of bits (1:0)
RW
PLL controlled
by SMBus
registers
PLL controlled
by device pins
1
Bit 6
RW
X
Bit 5
RW
X
Bit 4
RW
X
Bit 3
RW
X
Bit 2
RW
X
Bit 1
PLL BW #adjust
Selects PLL
Bandwidth
RW
Low BW
High BW
1
Bit 0
PLL Enable
Bypasses PLL for
board test
RW
PLL bypassed
(fan out mode)
PLL enabled
(ZDB mode)
1
SMB usTable: Output Enable Register
Pin #
Name
Control Function Type
0
1
Default
Bit 7
RW
X
Bit 6
RW
X
Bit 5
PCIEX5
Output Control
RW
Disable
Enable
1
Bit 4
RW
X
Bit 3
PCIEX3
Output Control
RW
Disable
Enable
1
Bit 2
PCIEX2
Output Control
RW
Disable
Enable
1
Bit 1
RW
X
Bit 0
PCIEX0
Output Control
RW
Disable
Enable
1
SMB usTable: Function Select Register
Pin #
Name
Control Function Type
0
1
Default
Bit 7
RW
X
Bit 6
RW
X
Bit 5
RW
X
Bit 4
RW
X
Bit 3
RW
X
Bit 2
RW
X
Bit 1
RW
X
Bit 0
RW
X
SMB usTable: Vendor & Revision ID Register
Pin #
Name
Control Function Type
0
1
Default
Bit 7
RID3
R
-
0
Bit 6
RID2
R
-
0
Bit 5
RID1
R
-
0
Bit 4
RID0
R
-
1
Bit 3
VID3
R
-
0
Bit 2
VID2
R
-
0
Bit 1
VID1
R
-
0
Bit 0
VID0
R
-
1
-
RESERVED
-
RESERVED
-
RESERVED
-
VENDOR ID
-
--
Byte 3
RESERVED
-
18,17
11,12
-
5,6
Byte 2
-
RESERVED
-
Byte 1
-
24,23
-
RESERVED
-
RESERVED
-
RESERVED
-
RESERVED
-
RESERVED
REVISION ID
-
RESERVED
Byte 0
-
RESERVED
-
RESERVED
-
RESERVED
-
RESERVED
-
RESERVED
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PDF描述 |
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| 9DB633AGILFT | 9DB SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 9DB633AGLFT | 9DB SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 9DB633AFILF | 9DB SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9DB633AFLIFT | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Six Output Differential Buffer for PCIe Gen3 |
| 9DB633AGILF | 功能描述:時(shí)鐘緩沖器 4 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 9DB633AGILFT | 功能描述:時(shí)鐘緩沖器 4 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 9DB633AGLF | 功能描述:時(shí)鐘緩沖器 4 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 9DB633AGLFT | 功能描述:時(shí)鐘緩沖器 4 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
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