參數(shù)資料
型號: 9DB433AFLIFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 9DB SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
封裝: 0.209 INCH, ROHS COMPLIANT, MO-150, SSOP-28
文件頁數(shù): 9/16頁
文件大?。?/td> 190K
代理商: 9DB433AFLIFT
IDT
Four Output Differential Buffer for PCIe Gen 3
1658B - 05/09/11
9DB433
Four Output Differential Buffer for PCIe Gen 3
2
Pin Configuration
Power Groups
28-pin SSOP & TSSOP
SMBus Address Selection and Readback
SMB_ADR_tri
Address
Low
DA/DB
Mid
DC/DD
High
D8/D9
Tri-level Input Logic Levels
State of Pin
Voltage
Low
<0.8V
Mid
1.2<Vin<1.8V
High
Vin > 2.0V
Operating Mode Readback Table
BYP#_LOBW_HIBW
MODE
Byte0, bit 3 Byte 0 bit 1
Low
Bypass
0
Mid
PLL 100M Hi BW
1
0
High
PLL 100M Low BW
0
1
VDD
GND
1
4
SRC_IN/SRC_IN#
5,11,18, 24
4
DIF(1,2,5,6)
16
15
DIGITAL VDD/GND
28
27
Analog VDD/GND for PLL in IREF
For best results, treat pin 1 as analog VDD.
Description
Pin Number
VDDR 1
28 VDDA
SRC_IN 2
27 GNDA
SRC_IN# 3
26 IREF
GND 4
25 PD#
VDD 5
24 VDD
DIF_1 6
23 DIF_6
DIF_1# 7
22 DIF_6#
OE1# 8
21 OE6#
DIF_2 9
20 DIF_5
DIF_2# 10
19 DIF_5#
VDD 11
18 VDD
BYP#_HIBW_LOBW 12
17 SMB_ADR_tri
SMBCLK 13
16 VDD
SMBDAT 14
15 GND
Notes:
9D
B
433
Highlighted Pins are the differences between 9DB403 and
9DB433.
Pin 12 and Pin 17 are latched on power up. Please make sure
that the power supply to the pullup/pulldown resistors ramps at
the same time as the main supply to the chip.
相關(guān)PDF資料
PDF描述
9DB433AGILFT 9DB SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
9DB433AFLFT 9DB SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
9DB633AFLIFT 9DB SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
9DB633AGILF 9DB SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
9DB633AFLFT 9DB SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
9DB433AGILF 功能描述:時鐘緩沖器 4 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲(最大值): 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel
9DB433AGILFT 功能描述:鎖相環(huán) - PLL 4 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
9DB433AGLF 功能描述:時鐘緩沖器 4 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲(最大值): 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel
9DB433AGLFT 功能描述:時鐘緩沖器 4 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲(最大值): 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel
9DB633 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Six Output Differential Buffer for PCIe Gen3