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參數(shù)資料
| 型號(hào)： | 9DB403DGILFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 9DB SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-28 |
| 文件頁數(shù)： | 11/19頁 |
| 文件大?。?/td> | 194K |
| 代理商： | 9DB403DGILFT |
ICS9DB403D
Four Output Differential Buffer for PCIe Gen 1 and Gen 2
19
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800-345-7015
408-284-8200
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Corporate Headquarters
Integrated Device Technology, Inc.
6024 Silver Creek Valley Road
San Jose, CA 95138
United States
800 345 7015
+408 284 8200 (outside U.S.)
Asia Pacific and Japan
Integrated Device Technology
Singapore (1997) Pte. Ltd.
Reg. No. 199707558G
435 Orchard Road
#20-03 Wisma Atria
Singapore 238877
+65 6 887 5505
Europe
IDT Europe, Limited
Prime House
Barnett Wood Lane
Leatherhead, Surrey
United Kingdom KT22 7DE
+44 1372 363 339
2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated
Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks
or registered trademarks used to identify products or services of their respective owners.
Printed in USA
TM
Revision History
Rev.
Issue Date Description
Page #
A
8/15/2006
1. Updated electrical characteristics for final data sheet
2. Corrected references to 8 outputs (should be 4)
-
B
5/22/2007
Updated Polarity Inversion Table.
2
C
1/16/2008
1. Corrected SMBus table to eliminate non-existant outputs. This effects
bytes 1 and 2.
2. Changed PWD notation to Default in SMBus descriptions
11
D
2/29/2008
Added Input Clock Specs
6
E
3/18/2008
Fixed typo in Input Clock Parameters
6
F
4/9/2008
Updated Input Clock Specs
6
G
8/19/2008
Corrected typos on Bytes 1 and 2.
11
H
8/26/2008
1. Updated Electrical Characteristics to add propagation delay and phase
noise information.
2. Corrected SMBus to reference pin numbers for 403 instead of 803 device.
3. Removed references to OE controls that are not present on 403.
4. Added SMBus electrical characteristics
5. Added foot note about DIF input running in order for the SMBus interface
to work
6. Added foot note to Byte 1 about functionality of OE bits and OE pins.
7. Corrected Block Diagram with proper OE pins indicated.
Various
I
11/26/2008 Updated SMBus table - Byte0:Byte3.
11
J
2/6/2009
Added Industrial temp. specs and ordering information.
Various
K
7/13/2009
Updated general description and block diagram
1
L
10/7/2009
1. Clarified that Vih and Vil values were for Single ended inputs
2. Added separate Idd values for the 9DB403
3. Added Differential Clock input parameters.
Various
M
1/27/2011
Updated Termination Figure 4
10
N
5/6/2011
1. Update pin 1 pin-name and pin description from VDD to VDDR. This
highlights that optimal peformance is obtained by treating VDDR as in analog
pin. This is a document update only, there is no silicon change.
Various
相關(guān)PDF資料 |
PDF描述 |
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| 9DB403DFILFT | 9DB SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 9DB403DFILF | 9DB SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 9DB403DGLF | 9DB SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 9DB403DFLFT | 9DB SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 9DB403DFLF | 9DB SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9DB403DGLF | 功能描述:時(shí)鐘緩沖器 4 OUTPUT PCIE GEN1 BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 9DB403DGLFT | 功能描述:時(shí)鐘緩沖器 4 OUTPUT PCIE GEN1 BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 9DB403EGILF | 制造商:Integrated Device Technology Inc 功能描述:IDT 9DB403EGILF General Purpose Semiconductors |
| 9DB423B | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Four Output Differential Buffer for PCIe Gen 1, Gen 2 and QPI |
| 9DB423BFLF | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 4 OUTPUT PCIE GEN2 BUFFER w/QPI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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