參數(shù)資料
型號(hào): 9DB403DFLFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: 9DB SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
封裝: 0.209 INCH, ROHS COMPLIANT, MO-150, SSOP-28
文件頁數(shù): 15/19頁
文件大?。?/td> 194K
代理商: 9DB403DFLFT
IDTTM/ICSTM
Four Output Differential Buffer for PCIe Gen 1 and Gen 2
ICS9DB403D
REV N 05/09/11
ICS9DB403D
Four Output Differential Buffer for PCIe for Gen 1 and Gen 2
5
Absolute Max
Electrical Characteristics - Clock Input Parameters
TA = Tambient for the desired operating range, Supply Voltage VDD = 3.3 V +/-5%
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS NOTES
Input High Voltage -
DIF_IN
VIHDIF
Differential inputs
(single-ended measurement)
600
800
1150
mV
1
Input Low Voltage -
DIF_IN
VILDIF
Differential inputs
(single-ended measurement)
VSS - 300
0
300
mV
1
Input Common Mode
Voltage - DIF_IN
VCOM
Common Mode Input Voltage
300
1000
mV
1
Input Amplitude - DIF_IN
VSWING
Peak to Peak value
300
1450
mV
1
Input Slew Rate - DIF_IN
dv/dt
Measured differentially
0.4
8
V/ns
1,2
Input Leakage Current
IIN
VIN = VDD , VIN = GND
-5
5
uA
1
Input Duty Cycle
dtin
Measurement from differential wavefrom
45
55
%
1
Input Jitter - Cycle to
Cycle
JDIFIn
Differential Measurement
0
125
ps
1
1 Guaranteed by design and characterization, not 100% tested in production.
2Slew rate measured through Vswing min centered around differential zero
Symbol
Parameter
Min
Max
Units
VDDA/R
3.3V Core Supply Voltage
4.6
V
VDD
3.3V Logic Supply Voltage
4.6
V
VIL
Input Low Voltage
GND-0.5
V
VIH
Input High Voltage
VDD+0.5V
V
Ts
Storage Temperature
-65
150
°C
Commerical Operating Range
0
70
°C
Industrial Operating Range
-40
85
°C
Tcase
Case Temperature
115
°C
ESD prot
Input ESD protection
human body model
2000
V
Tambient
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