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參數(shù)資料
| 型號： | 9DB233AGLF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 9DB SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| 封裝： | 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-20 |
| 文件頁數(shù)： | 6/14頁 |
| 文件大?。?/td> | 160K |
| 代理商： | 9DB233AGLF |
9DB233
Two Output Differential Buffer for PCIe Gen3
14
Datasheet
Innovate with IDT and accelerate your future networks. Contact:
www.IDT.com
For Sales
800-345-7015
408-284-8200
Fax: 408-284-2775
For Tech Support
408-284-6578
pcclockhelp@idt.com
Corporate Headquarters
Integrated Device Technology, Inc.
6024 Silver Creek Valley Road
San Jose, CA 95138
United States
800 345 7015
+408 284 8200 (outside U.S.)
Asia Pacific and Japan
IDT Singapore Pte. Ltd.
1 Kallang Sector #07-01/06
KolamAyer Industrial Park
Singapore 349276
Phone: 65-6-744-3356
Fax: 65-6-744-1764
Europe
IDT Europe Limited
321 Kingston Road
Leatherhead, Surrey
KT22 7TU
England
Phone: 44-1372-363339
Fax: 44-1372-378851
2010 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, ICS, and the IDT logo are trademarks
of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks
are or may be trademarks or registered trademarks used to identify products or services of their respective owners.
Printed in USA
Revision History
Rev.
Who Issue Date D escription
Page #
0.1
R DW
4/28/2010 1. Initial Release
0.2
R DW
6/3/2010
1. Updated Pin names to match other 9DB devices CLKREQ# becomes OE#
and PCIEXyy becomes DIF_yy
2. Updated maximum rise/fall time to 550ps from 700ps. This translates to a
minimum slew rate of 0.67V/ns thus meeting the PCIe spec of 0.6V/ns.
3. Updated phase jitter tables to remove references to QPI.
4. Reformatted DS to have common format amongst all 9DBx33 DS.
5. Updated block diagram to match item 1
6
0.3
R DW
6/25/2010
1. Updated electrical tables to new standard format for 9DB devices.
2. Cleaned up front page text.
1, 3-6
A
R DW
6/30/2010 R eleased to final
B
R DW
7/12/2010 1. Changed PWD to Default in SMBus tables.
10,11
C
R DW
4/20/2011 C hanged pull down indicator from '**' to ' v '.
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| 9DB233AFILF | 9DB SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| 9DB233AFLF | 9DB SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| 9DB233AFLFT | 9DB SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| 9DB306BFLFT | 9DB SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 9DB306BFLF | 9DB SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9DB233AGLFT | 功能描述:時鐘緩沖器 2 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 9DB306BF | 制造商:Integrated Device Technology Inc 功能描述:9DB306BF - Rail/Tube |
| 9DB306BFT | 制造商:Integrated Device Technology Inc 功能描述:9DB306BFT - Tape and Reel |
| 9DB306BL | 制造商:Integrated Device Technology Inc 功能描述:PCI EXPRESS, JITTER ATTENUATOR. TSSOP28 - Rail/Tube |
| 9DB306BLI | 制造商:Integrated Device Technology Inc 功能描述:ZERO DLY PLL CLOCK BFFR SGL 28TSSOP - Rail/Tube |
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