參數(shù)資料
型號: 9DB233AGILFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 9DB SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
封裝: 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-20
文件頁數(shù): 13/14頁
文件大小: 160K
代理商: 9DB233AGILFT
IDT
Two Output Differential Buffer for PCIe Gen3
1667C—04/20/11
9DB233
Two Output Differential Buffer for PCIe Gen3
8
Datasheet
Vdiff
Vp-p
Vcm
R1
R2
R3
R4
Note
0.45v
0.22v
1.08
33
150
100
0.58
0.28
0.6
33
78.7
137
100
0.80
0.40
0.6
33
78.7
none
100
ICS874003i-02 input compatible
0.60
0.3
1.2
33
174
140
100
Standard LVDS
R1a = R1b = R1
R2a = R2b = R2
Alternative Termination for LVDS and other Common Differential Signals (figure 3)
HCSL Output Buffer
L1
L1'
R1b
L2
L2'
R1a
L4'
L4
L3
R2a
R2b
Down Device
REF_CLK Input
Figure 3
L3'
R3
R4
Component
Value
Note
R5a, R5b
8.2K 5%
R6a, R6b
1K 5%
Cc
0.1 F
Vcm
0.350 volts
Cable Connected AC Coupled Application (figure 4)
PCIe Device
REF_CLK Input
Figure 4
R5a
L4'
L4
3.3 Volts
R5b
R6a
R6b
Cc
相關PDF資料
PDF描述
9DB233AGILF 9DB SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
9DB233AGLF 9DB SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
9DB233AFILF 9DB SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
9DB233AFLF 9DB SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
9DB233AFLFT 9DB SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
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