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參數(shù)資料
| 型號： | 97ULP877BH |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 97ULP SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA52 |
| 封裝： | PLASTIC, MO-205, MO-225, FBGA-52 |
| 文件頁數(shù)： | 10/15頁 |
| 文件大?。?/td> | 252K |
| 代理商： | 97ULP877BH |
4
ICS97ULP877B
0981B—03/15/05
Absolute Maximum Ratings
Supply Voltage (VDDQ & AVDD) . . . . . . . . . -0.5V to 2.5V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.5V to VDDQ + 0.5V
Ambient Operating Temperature . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Stresses above those listed under
Absolute Maximum Ratings may cause permanent damage to the device. These
ratings are stress specifications only and functional operation of the device at these or any other conditions above those
listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0 - 70°C; Supply Voltage AVDDQ, VDDQ = 1.8 V +/- 0.1V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input High Current
(CLK_INT, CLK_INC)
IIH
VI = VDDQ or GND
±250
A
Input Low Current (OE,
OS, FB_INT, FB_INC)
IIL
VI = VDDQ or GND
±10
A
Output Disabled Low
Current
IODL
OE = L, VODL = 100mV
100
A
IDD1.8
CL = 0pf @ 270MHz
200
mA
IDDLD
CL = 0pf
500
A
Input Clamp Voltage
VIK
VDDQ = 1.7V Iin = -18mA
-1.2
V
IOH = -100 AVDDQ - 0.2
V
IOH = -9 mA
1.1
1.45
V
IOL=100 A0.25
0.10
V
IOL=9 mA
0.6
V
Input Capacitance
1
CIN
VI = GND or VDDQ
23
pF
Output Capacitance
1
COUT
VOUT = GND or VDDQ
23
pF
1Guaranteed by design, not 100% tested in production.
Operating Supply
Current
High-level output
voltage
VOH
Low-level output voltage
VOL
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