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| 型號(hào)： | 97SD3240RPQI |
| 廠商： | MAXWELL TECHNOLOGIES |
| 元件分類： | DRAM |
| 英文描述： | 1.25Gb SDRAM 8-Meg X 40-Bit X 4-Banks |
| 中文描述： | 32M X 40 SYNCHRONOUS DRAM, 6 ns, QFP132 |
| 封裝： | STACK, QFP-132 |
| 文件頁(yè)數(shù)： | 34/39頁(yè) |
| 文件大?。?/td> | 759K |
| 代理商： | 97SD3240RPQI |
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97SD3240
M
em
o
ry
4
All data sheets are subject to change without notice
2006 Maxwell Technologies
All rights reserved.
1.25Gb (8-Meg X 40-Bit X 4-Banks) SDRAM
05.10.06 Rev 4
Standby Current in non power down6
I
CC2N
CKE, CS = V
IH
t
CK = 12 ns
1, 2, 3
100
mA
Standby Current in non power down7
( Input signal stable)
I
CC2NS
CKE = V
IH
t
CK = 0
1, 2, 3
45
mA
Active standby current in1,2,4
power down
I
CC3P
CKE = V
IL
t
CK = 12 ns
1, 2, 3
20
mA
Active standby current in power down
(input signal stable)2,5
I
CC3PS
CKE = V
IL
t
CK = 0
1, 2, 3
15
mA
Active standby power in non power
down1,2,6
I
CC3N
CKE, CS1-6 = V
IH
t
CK = 12 ns
1, 2, 3
150
mA
Active standby current in non power
down ( input signal stable)2,7
I
CC3NS
CKE = V
IH
t
CK = 0
1, 2, 3
75
mA
Burst Operating Current1,2,8
CAS Latency = 2
CAS Latency = 3
I
CC4
t
CK = min
BL = 4
1, 2, 3
550
725
mA
Refresh Current3
I
CC5
t
RC = min
1, 2, 3
1100
mA
Self Refresh current9
I
CC6
V
IH>VCC - 0.2V
V
IL < 0.2 V
1, 2, 3
15
mA
Input Leakage Current - CLK
I
LI
0<V
LI<VCC
1, 2, 3
-3
3
uA
Input Leakage Current - All Other
I
LI
0<V
LI<VCC
1, 2, 3
-5
5
uA
Output Leakage Current
I
LO
0<V
LO<VCC
1, 2, 3
-1.5
1.5
uA
Output high voltage
V
OH
I
OH = -4mA
1, 2, 3
2.4
V
Output low voltage
V
OL
I
OL = 4 mA
1, 2, 3
0.4
V
1. I
CC1 depends on output load conditions when the device is selected. ICC1(max) is specified with the output open.
2. One Bank Operation
3. Input signals are changed once per clock.
4. After power down mode, CLK operating current.
5. After power down mode, no CLK operating current.
6. Input signals are changed once per two clocks.
7. Input signals for V
IH or VIL are fixed.
8. Input signals are changed once per four clocks.
9. After self refresh mode set, self refresh current. Use Self Refresh for temperatures less than 70 °C ONLY.
TABLE 4. DC ELECTRICAL CHARACTERISTICS
(V
CC = 3.3V + 0.3V, VCCQ = 3.3V + 0.3V, TA = -55 TO 125° C, UNLESS OTHERWISE SPECIFIED)
PARAMETER
SYMBOL
TEST CONDITIONS
SUBGROUPS
MIN
MAX
UNITS
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| 97SD3240RPQK | 1.25Gb SDRAM 8-Meg X 40-Bit X 4-Banks |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 97SD3240RPQK | 制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:1.25Gb SDRAM 8-Meg X 40-Bit X 4-Banks |
| 97SD3248 | 制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:1.5Gb SDRAM 8-Meg X 48-Bit X 4-Banks |
| 97SD3248_06 | 制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:1.5Gb SDRAM 8-Meg X 48-Bit X 4-Banks |
| 97SD3248RPQE | 制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:1.5Gb SDRAM 8-Meg X 48-Bit X 4-Banks |
| 97SD3248RPQH | 制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:1.5Gb SDRAM 8-Meg X 48-Bit X 4-Banks |
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